tree 2915f8998a98da26677dcaeb2a36e0040a8b65f5
parent be106f192e7e77a9038adf577aafa6c2d4e03b6c
author Alex Van Damme <atv@google.com> 1755635391 -0700
committer Alex Van Damme <atv@google.com> 1756426191 -0700

feat(soc): Add data-driven TileLink-UL crossbar

This commit introduces a data-driven TileLink-UL crossbar for the
Kelvin SoC. The entire crossbar topology is defined in a single
`CrossbarConfig.scala` file, which serves as the single source of
truth for hosts, devices, address maps, and connections.

The `KelvinXbar.scala` module programmatically generates the crossbar
by instantiating and connecting the necessary TileLink primitives
(sockets, FIFOs, width bridges) based on the configuration. This
approach provides a flexible and maintainable way to manage the SoC's
interconnect.

Key features:
- Centralized configuration in `CrossbarConfig.scala`.
- A validator to check for configuration errors, such as overlapping
  address ranges.
- Automatic instantiation of TileLink primitives.
- Programmatic address decoding and wiring.
- Support for multiple, asynchronous clock domains.
- A comprehensive cocotb test suite (`kelvin_xbar_test.py`) that
  verifies various data paths, including width and clock domain
  crossings, error responses, and integrity checks.

Change-Id: I6b341aadfabcc9c2220c1818246989c35bba8ad5