// Copyright 2023 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
// clang-format off

#ifndef PATCHES_KELVIN_KELVIN_OPC_H_
#define PATCHES_KELVIN_KELVIN_OPC_H_

#define MATCH_EEXIT                0x02000073
#define MASK_EEXIT                 0xffffffff
#define MATCH_EYIELD               0x04000073
#define MASK_EYIELD                0xffffffff
#define MATCH_ECTXSW               0x06000073
#define MASK_ECTXSW                0xffffffff
#define MATCH_MPAUSE               0x08000073
#define MASK_MPAUSE                0xffffffff

#define MATCH_FLOG                 0x78000077
#define MASK_FLOG                  0xfff07fff
#define MATCH_SLOG                 0x78001077
#define MASK_SLOG                  0xfff07fff
#define MATCH_CLOG                 0x78002077
#define MASK_CLOG                  0xfff07fff
#define MATCH_KLOG                 0x78003077
#define MASK_KLOG                  0xfff07fff

#define MATCH_FLUSHALL             0x26000077
#define MASK_FLUSHALL              0xffffffff
#define MATCH_FLUSHAT              0x26000077
#define MASK_FLUSHAT               0xfff07fff

#define MATCH_GETMAXVL_B           0x10000077
#define MASK_GETMAXVL_B            0xfffff07f
#define MATCH_GETMAXVL_H           0x12000077
#define MASK_GETMAXVL_H            0xfffff07f
#define MATCH_GETMAXVL_W           0x14000077
#define MASK_GETMAXVL_W            0xfffff07f
#define MATCH_GETVL_B_X            0x10000077
#define MASK_GETVL_B_X             0xfff0707f
#define MATCH_GETVL_H_X            0x12000077
#define MASK_GETVL_H_X             0xfff0707f
#define MATCH_GETVL_W_X            0x14000077
#define MASK_GETVL_W_X             0xfff0707f
#define MATCH_GETVL_B_XX           0x10000077
#define MASK_GETVL_B_XX            0xfe00707f
#define MATCH_GETVL_H_XX           0x12000077
#define MASK_GETVL_H_XX            0xfe00707f
#define MATCH_GETVL_W_XX           0x14000077
#define MASK_GETVL_W_XX            0xfe00707f

#define MATCH_GETMAXVL_B_M         0x18000077
#define MASK_GETMAXVL_B_M          0xfffff07f
#define MATCH_GETMAXVL_H_M         0x1a000077
#define MASK_GETMAXVL_H_M          0xfffff07f
#define MATCH_GETMAXVL_W_M         0x1c000077
#define MASK_GETMAXVL_W_M          0xfffff07f
#define MATCH_GETVL_B_X_M          0x18000077
#define MASK_GETVL_B_X_M           0xfff0707f
#define MATCH_GETVL_H_X_M          0x1a000077
#define MASK_GETVL_H_X_M           0xfff0707f
#define MATCH_GETVL_W_X_M          0x1c000077
#define MASK_GETVL_W_X_M           0xfff0707f
#define MATCH_GETVL_B_XX_M         0x18000077
#define MASK_GETVL_B_XX_M          0xfe00707f
#define MATCH_GETVL_H_XX_M         0x1a000077
#define MASK_GETVL_H_XX_M          0xfe00707f
#define MATCH_GETVL_W_XX_M         0x1c000077
#define MASK_GETVL_W_XX_M          0xfe00707f

// 111 Load/Store
#define MATCH_VLD_B_X              0x0000001f
#define MASK_VLD_B_X               0xfff0703f
#define MATCH_VLD_B_P_X            0x1000001f
#define MASK_VLD_B_P_X             0xfff0703f
#define MATCH_VLD_B_L_XX           0x0400001f
#define MASK_VLD_B_L_XX            0xfe00703f
#define MATCH_VLD_B_S_XX           0x0800001f
#define MASK_VLD_B_S_XX            0xfe00703f
#define MATCH_VLD_B_P_XX           0x1000001f
#define MASK_VLD_B_P_XX            0xfe00703f
#define MATCH_VLD_B_LP_XX          0x1400001f
#define MASK_VLD_B_LP_XX           0xfe00703f
#define MATCH_VLD_B_SP_XX          0x1800001f
#define MASK_VLD_B_SP_XX           0xfe00703f
#define MATCH_VLD_B_TP_XX          0x1c00001f
#define MASK_VLD_B_TP_XX           0xfe00703f
#define MATCH_VLD_B_X_M            0x0000003f
#define MASK_VLD_B_X_M             0xfff0703f
#define MATCH_VLD_B_P_X_M          0x1000003f
#define MASK_VLD_B_P_X_M           0xfff0703f
#define MATCH_VLD_B_L_XX_M         0x0400003f
#define MASK_VLD_B_L_XX_M          0xfe00703f
#define MATCH_VLD_B_S_XX_M         0x0800003f
#define MASK_VLD_B_S_XX_M          0xfe00703f
#define MATCH_VLD_B_P_XX_M         0x1000003f
#define MASK_VLD_B_P_XX_M          0xfe00703f
#define MATCH_VLD_B_LP_XX_M        0x1400003f
#define MASK_VLD_B_LP_XX_M         0xfe00703f
#define MATCH_VLD_B_SP_XX_M        0x1800003f
#define MASK_VLD_B_SP_XX_M         0xfe00703f
#define MATCH_VLD_B_TP_XX_M        0x1c00003f
#define MASK_VLD_B_TP_XX_M         0xfe00703f
#define MATCH_VLD_H_X              0x0000101f
#define MASK_VLD_H_X               0xfff0703f
#define MATCH_VLD_H_P_X            0x1000101f
#define MASK_VLD_H_P_X             0xfff0703f
#define MATCH_VLD_H_L_XX           0x0400101f
#define MASK_VLD_H_L_XX            0xfe00703f
#define MATCH_VLD_H_S_XX           0x0800101f
#define MASK_VLD_H_S_XX            0xfe00703f
#define MATCH_VLD_H_P_XX           0x1000101f
#define MASK_VLD_H_P_XX            0xfe00703f
#define MATCH_VLD_H_LP_XX          0x1400101f
#define MASK_VLD_H_LP_XX           0xfe00703f
#define MATCH_VLD_H_SP_XX          0x1800101f
#define MASK_VLD_H_SP_XX           0xfe00703f
#define MATCH_VLD_H_TP_XX          0x1c00101f
#define MASK_VLD_H_TP_XX           0xfe00703f
#define MATCH_VLD_H_X_M            0x0000103f
#define MASK_VLD_H_X_M             0xfff0703f
#define MATCH_VLD_H_P_X_M          0x1000103f
#define MASK_VLD_H_P_X_M           0xfff0703f
#define MATCH_VLD_H_L_XX_M         0x0400103f
#define MASK_VLD_H_L_XX_M          0xfe00703f
#define MATCH_VLD_H_S_XX_M         0x0800103f
#define MASK_VLD_H_S_XX_M          0xfe00703f
#define MATCH_VLD_H_P_XX_M         0x1000103f
#define MASK_VLD_H_P_XX_M          0xfe00703f
#define MATCH_VLD_H_LP_XX_M        0x1400103f
#define MASK_VLD_H_LP_XX_M         0xfe00703f
#define MATCH_VLD_H_SP_XX_M        0x1800103f
#define MASK_VLD_H_SP_XX_M         0xfe00703f
#define MATCH_VLD_H_TP_XX_M        0x1c00103f
#define MASK_VLD_H_TP_XX_M         0xfe00703f
#define MATCH_VLD_W_X              0x0000201f
#define MASK_VLD_W_X               0xfff0703f
#define MATCH_VLD_W_P_X            0x1000201f
#define MASK_VLD_W_P_X             0xfff0703f
#define MATCH_VLD_W_L_XX           0x0400201f
#define MASK_VLD_W_L_XX            0xfe00703f
#define MATCH_VLD_W_S_XX           0x0800201f
#define MASK_VLD_W_S_XX            0xfe00703f
#define MATCH_VLD_W_P_XX           0x1000201f
#define MASK_VLD_W_P_XX            0xfe00703f
#define MATCH_VLD_W_LP_XX          0x1400201f
#define MASK_VLD_W_LP_XX           0xfe00703f
#define MATCH_VLD_W_SP_XX          0x1800201f
#define MASK_VLD_W_SP_XX           0xfe00703f
#define MATCH_VLD_W_TP_XX          0x1c00201f
#define MASK_VLD_W_TP_XX           0xfe00703f
#define MATCH_VLD_W_X_M            0x0000203f
#define MASK_VLD_W_X_M             0xfff0703f
#define MATCH_VLD_W_P_X_M          0x1000203f
#define MASK_VLD_W_P_X_M           0xfff0703f
#define MATCH_VLD_W_L_XX_M         0x0400203f
#define MASK_VLD_W_L_XX_M          0xfe00703f
#define MATCH_VLD_W_S_XX_M         0x0800203f
#define MASK_VLD_W_S_XX_M          0xfe00703f
#define MATCH_VLD_W_P_XX_M         0x1000203f
#define MASK_VLD_W_P_XX_M          0xfe00703f
#define MATCH_VLD_W_LP_XX_M        0x1400203f
#define MASK_VLD_W_LP_XX_M         0xfe00703f
#define MATCH_VLD_W_SP_XX_M        0x1800203f
#define MASK_VLD_W_SP_XX_M         0xfe00703f
#define MATCH_VLD_W_TP_XX_M        0x1c00203f
#define MASK_VLD_W_TP_XX_M         0xfe00703f
#define MATCH_VST_B_X              0x2000001f
#define MASK_VST_B_X               0xfff0703f
#define MATCH_VST_B_P_X            0x3000001f
#define MASK_VST_B_P_X             0xfff0703f
#define MATCH_VST_B_L_XX           0x2400001f
#define MASK_VST_B_L_XX            0xfe00703f
#define MATCH_VST_B_S_XX           0x2800001f
#define MASK_VST_B_S_XX            0xfe00703f
#define MATCH_VST_B_P_XX           0x3000001f
#define MASK_VST_B_P_XX            0xfe00703f
#define MATCH_VST_B_LP_XX          0x3400001f
#define MASK_VST_B_LP_XX           0xfe00703f
#define MATCH_VST_B_SP_XX          0x3800001f
#define MASK_VST_B_SP_XX           0xfe00703f
#define MATCH_VST_B_TP_XX          0x3c00001f
#define MASK_VST_B_TP_XX           0xfe00703f
#define MATCH_VST_B_X_M            0x2000003f
#define MASK_VST_B_X_M             0xfff0703f
#define MATCH_VST_B_P_X_M          0x3000003f
#define MASK_VST_B_P_X_M           0xfff0703f
#define MATCH_VST_B_L_XX_M         0x2400003f
#define MASK_VST_B_L_XX_M          0xfe00703f
#define MATCH_VST_B_S_XX_M         0x2800003f
#define MASK_VST_B_S_XX_M          0xfe00703f
#define MATCH_VST_B_P_XX_M         0x3000003f
#define MASK_VST_B_P_XX_M          0xfe00703f
#define MATCH_VST_B_LP_XX_M        0x3400003f
#define MASK_VST_B_LP_XX_M         0xfe00703f
#define MATCH_VST_B_SP_XX_M        0x3800003f
#define MASK_VST_B_SP_XX_M         0xfe00703f
#define MATCH_VST_B_TP_XX_M        0x3c00003f
#define MASK_VST_B_TP_XX_M         0xfe00703f
#define MATCH_VST_H_X              0x2000101f
#define MASK_VST_H_X               0xfff0703f
#define MATCH_VST_H_P_X            0x3000101f
#define MASK_VST_H_P_X             0xfff0703f
#define MATCH_VST_H_L_XX           0x2400101f
#define MASK_VST_H_L_XX            0xfe00703f
#define MATCH_VST_H_S_XX           0x2800101f
#define MASK_VST_H_S_XX            0xfe00703f
#define MATCH_VST_H_P_XX           0x3000101f
#define MASK_VST_H_P_XX            0xfe00703f
#define MATCH_VST_H_LP_XX          0x3400101f
#define MASK_VST_H_LP_XX           0xfe00703f
#define MATCH_VST_H_SP_XX          0x3800101f
#define MASK_VST_H_SP_XX           0xfe00703f
#define MATCH_VST_H_TP_XX          0x3c00101f
#define MASK_VST_H_TP_XX           0xfe00703f
#define MATCH_VST_H_X_M            0x2000103f
#define MASK_VST_H_X_M             0xfff0703f
#define MATCH_VST_H_P_X_M          0x3000103f
#define MASK_VST_H_P_X_M           0xfff0703f
#define MATCH_VST_H_L_XX_M         0x2400103f
#define MASK_VST_H_L_XX_M          0xfe00703f
#define MATCH_VST_H_S_XX_M         0x2800103f
#define MASK_VST_H_S_XX_M          0xfe00703f
#define MATCH_VST_H_P_XX_M         0x3000103f
#define MASK_VST_H_P_XX_M          0xfe00703f
#define MATCH_VST_H_LP_XX_M        0x3400103f
#define MASK_VST_H_LP_XX_M         0xfe00703f
#define MATCH_VST_H_SP_XX_M        0x3800103f
#define MASK_VST_H_SP_XX_M         0xfe00703f
#define MATCH_VST_H_TP_XX_M        0x3c00103f
#define MASK_VST_H_TP_XX_M         0xfe00703f
#define MATCH_VST_W_X              0x2000201f
#define MASK_VST_W_X               0xfff0703f
#define MATCH_VST_W_P_X            0x3000201f
#define MASK_VST_W_P_X             0xfff0703f
#define MATCH_VST_W_L_XX           0x2400201f
#define MASK_VST_W_L_XX            0xfe00703f
#define MATCH_VST_W_S_XX           0x2800201f
#define MASK_VST_W_S_XX            0xfe00703f
#define MATCH_VST_W_P_XX           0x3000201f
#define MASK_VST_W_P_XX            0xfe00703f
#define MATCH_VST_W_LP_XX          0x3400201f
#define MASK_VST_W_LP_XX           0xfe00703f
#define MATCH_VST_W_SP_XX          0x3800201f
#define MASK_VST_W_SP_XX           0xfe00703f
#define MATCH_VST_W_TP_XX          0x3c00201f
#define MASK_VST_W_TP_XX           0xfe00703f
#define MATCH_VST_W_X_M            0x2000203f
#define MASK_VST_W_X_M             0xfff0703f
#define MATCH_VST_W_P_X_M          0x3000203f
#define MASK_VST_W_P_X_M           0xfff0703f
#define MATCH_VST_W_L_XX_M         0x2400203f
#define MASK_VST_W_L_XX_M          0xfe00703f
#define MATCH_VST_W_S_XX_M         0x2800203f
#define MASK_VST_W_S_XX_M          0xfe00703f
#define MATCH_VST_W_P_XX_M         0x3000203f
#define MASK_VST_W_P_XX_M          0xfe00703f
#define MATCH_VST_W_LP_XX_M        0x3400203f
#define MASK_VST_W_LP_XX_M         0xfe00703f
#define MATCH_VST_W_SP_XX_M        0x3800203f
#define MASK_VST_W_SP_XX_M         0xfe00703f
#define MATCH_VST_W_TP_XX_M        0x3c00203f
#define MASK_VST_W_TP_XX_M         0xfe00703f
#define MATCH_VDUP_B_X             0x4000001f
#define MASK_VDUP_B_X              0xfe0ff03f
#define MATCH_VDUP_B_X_M           0x4000003f
#define MASK_VDUP_B_X_M            0xfe0ff03f
#define MATCH_VDUP_H_X             0x4000101f
#define MASK_VDUP_H_X              0xfe0ff03f
#define MATCH_VDUP_H_X_M           0x4000103f
#define MASK_VDUP_H_X_M            0xfe0ff03f
#define MATCH_VDUP_W_X             0x4000201f
#define MASK_VDUP_W_X              0xfe0ff03f
#define MATCH_VDUP_W_X_M           0x4000203f
#define MASK_VDUP_W_X_M            0xfe0ff03f
#define MATCH_VCGET                0x5000201f
#define MASK_VCGET                 0xfffff03f
#define MATCH_VSTQ_B_S_XX          0x6800001f
#define MASK_VSTQ_B_S_XX           0xfe00703f
#define MATCH_VSTQ_B_SP_XX         0x7800001f
#define MASK_VSTQ_B_SP_XX          0xfe00703f
#define MATCH_VSTQ_B_S_XX_M        0x6800003f
#define MASK_VSTQ_B_S_XX_M         0xfe00703f
#define MATCH_VSTQ_B_SP_XX_M       0x7800003f
#define MASK_VSTQ_B_SP_XX_M        0xfe00703f
#define MATCH_VSTQ_H_S_XX          0x6800101f
#define MASK_VSTQ_H_S_XX           0xfe00703f
#define MATCH_VSTQ_H_SP_XX         0x7800101f
#define MASK_VSTQ_H_SP_XX          0xfe00703f
#define MATCH_VSTQ_H_S_XX_M        0x6800103f
#define MASK_VSTQ_H_S_XX_M         0xfe00703f
#define MATCH_VSTQ_H_SP_XX_M       0x7800103f
#define MASK_VSTQ_H_SP_XX_M        0xfe00703f
#define MATCH_VSTQ_W_S_XX          0x6800201f
#define MASK_VSTQ_W_S_XX           0xfe00703f
#define MATCH_VSTQ_W_SP_XX         0x7800201f
#define MASK_VSTQ_W_SP_XX          0xfe00703f
#define MATCH_VSTQ_W_S_XX_M        0x6800203f
#define MASK_VSTQ_W_S_XX_M         0xfe00703f
#define MATCH_VSTQ_W_SP_XX_M       0x7800203f
#define MASK_VSTQ_W_SP_XX_M        0xfe00703f

// 000 Arithmetic
#define MATCH_VADD_B_VV            0x00000000
#define MASK_VADD_B_VV             0xfc00303f
#define MATCH_VADD_B_VX            0x00000002
#define MASK_VADD_B_VX             0xfe00303f
#define MATCH_VADD_B_VV_M          0x00000020
#define MASK_VADD_B_VV_M           0xfc00303f
#define MATCH_VADD_B_VX_M          0x00000022
#define MASK_VADD_B_VX_M           0xfe00303f
#define MATCH_VADD_H_VV            0x00001000
#define MASK_VADD_H_VV             0xfc00303f
#define MATCH_VADD_H_VX            0x00001002
#define MASK_VADD_H_VX             0xfe00303f
#define MATCH_VADD_H_VV_M          0x00001020
#define MASK_VADD_H_VV_M           0xfc00303f
#define MATCH_VADD_H_VX_M          0x00001022
#define MASK_VADD_H_VX_M           0xfe00303f
#define MATCH_VADD_W_VV            0x00002000
#define MASK_VADD_W_VV             0xfc00303f
#define MATCH_VADD_W_VX            0x00002002
#define MASK_VADD_W_VX             0xfe00303f
#define MATCH_VADD_W_VV_M          0x00002020
#define MASK_VADD_W_VV_M           0xfc00303f
#define MATCH_VADD_W_VX_M          0x00002022
#define MASK_VADD_W_VX_M           0xfe00303f
#define MATCH_VSUB_B_VV            0x04000000
#define MASK_VSUB_B_VV             0xfc00303f
#define MATCH_VSUB_B_VX            0x04000002
#define MASK_VSUB_B_VX             0xfe00303f
#define MATCH_VSUB_B_VV_M          0x04000020
#define MASK_VSUB_B_VV_M           0xfc00303f
#define MATCH_VSUB_B_VX_M          0x04000022
#define MASK_VSUB_B_VX_M           0xfe00303f
#define MATCH_VSUB_H_VV            0x04001000
#define MASK_VSUB_H_VV             0xfc00303f
#define MATCH_VSUB_H_VX            0x04001002
#define MASK_VSUB_H_VX             0xfe00303f
#define MATCH_VSUB_H_VV_M          0x04001020
#define MASK_VSUB_H_VV_M           0xfc00303f
#define MATCH_VSUB_H_VX_M          0x04001022
#define MASK_VSUB_H_VX_M           0xfe00303f
#define MATCH_VSUB_W_VV            0x04002000
#define MASK_VSUB_W_VV             0xfc00303f
#define MATCH_VSUB_W_VX            0x04002002
#define MASK_VSUB_W_VX             0xfe00303f
#define MATCH_VSUB_W_VV_M          0x04002020
#define MASK_VSUB_W_VV_M           0xfc00303f
#define MATCH_VSUB_W_VX_M          0x04002022
#define MASK_VSUB_W_VX_M           0xfe00303f
#define MATCH_VRSUB_B_VX           0x08000002
#define MASK_VRSUB_B_VX            0xfe00303f
#define MATCH_VRSUB_B_VX_M         0x08000022
#define MASK_VRSUB_B_VX_M          0xfe00303f
#define MATCH_VRSUB_H_VX           0x08001002
#define MASK_VRSUB_H_VX            0xfe00303f
#define MATCH_VRSUB_H_VX_M         0x08001022
#define MASK_VRSUB_H_VX_M          0xfe00303f
#define MATCH_VRSUB_W_VX           0x08002002
#define MASK_VRSUB_W_VX            0xfe00303f
#define MATCH_VRSUB_W_VX_M         0x08002022
#define MASK_VRSUB_W_VX_M          0xfe00303f
#define MATCH_VEQ_B_VV             0x18000000
#define MASK_VEQ_B_VV              0xfc00303f
#define MATCH_VEQ_B_VX             0x18000002
#define MASK_VEQ_B_VX              0xfe00303f
#define MATCH_VEQ_B_VV_M           0x18000020
#define MASK_VEQ_B_VV_M            0xfc00303f
#define MATCH_VEQ_B_VX_M           0x18000022
#define MASK_VEQ_B_VX_M            0xfe00303f
#define MATCH_VEQ_H_VV             0x18001000
#define MASK_VEQ_H_VV              0xfc00303f
#define MATCH_VEQ_H_VX             0x18001002
#define MASK_VEQ_H_VX              0xfe00303f
#define MATCH_VEQ_H_VV_M           0x18001020
#define MASK_VEQ_H_VV_M            0xfc00303f
#define MATCH_VEQ_H_VX_M           0x18001022
#define MASK_VEQ_H_VX_M            0xfe00303f
#define MATCH_VEQ_W_VV             0x18002000
#define MASK_VEQ_W_VV              0xfc00303f
#define MATCH_VEQ_W_VX             0x18002002
#define MASK_VEQ_W_VX              0xfe00303f
#define MATCH_VEQ_W_VV_M           0x18002020
#define MASK_VEQ_W_VV_M            0xfc00303f
#define MATCH_VEQ_W_VX_M           0x18002022
#define MASK_VEQ_W_VX_M            0xfe00303f
#define MATCH_VNE_B_VV             0x1c000000
#define MASK_VNE_B_VV              0xfc00303f
#define MATCH_VNE_B_VX             0x1c000002
#define MASK_VNE_B_VX              0xfe00303f
#define MATCH_VNE_B_VV_M           0x1c000020
#define MASK_VNE_B_VV_M            0xfc00303f
#define MATCH_VNE_B_VX_M           0x1c000022
#define MASK_VNE_B_VX_M            0xfe00303f
#define MATCH_VNE_H_VV             0x1c001000
#define MASK_VNE_H_VV              0xfc00303f
#define MATCH_VNE_H_VX             0x1c001002
#define MASK_VNE_H_VX              0xfe00303f
#define MATCH_VNE_H_VV_M           0x1c001020
#define MASK_VNE_H_VV_M            0xfc00303f
#define MATCH_VNE_H_VX_M           0x1c001022
#define MASK_VNE_H_VX_M            0xfe00303f
#define MATCH_VNE_W_VV             0x1c002000
#define MASK_VNE_W_VV              0xfc00303f
#define MATCH_VNE_W_VX             0x1c002002
#define MASK_VNE_W_VX              0xfe00303f
#define MATCH_VNE_W_VV_M           0x1c002020
#define MASK_VNE_W_VV_M            0xfc00303f
#define MATCH_VNE_W_VX_M           0x1c002022
#define MASK_VNE_W_VX_M            0xfe00303f
#define MATCH_VLT_B_VV             0x20000000
#define MASK_VLT_B_VV              0xfc00303f
#define MATCH_VLT_B_VX             0x20000002
#define MASK_VLT_B_VX              0xfe00303f
#define MATCH_VLT_B_U_VV           0x24000000
#define MASK_VLT_B_U_VV            0xfc00303f
#define MATCH_VLT_B_U_VX           0x24000002
#define MASK_VLT_B_U_VX            0xfe00303f
#define MATCH_VLT_B_VV_M           0x20000020
#define MASK_VLT_B_VV_M            0xfc00303f
#define MATCH_VLT_B_VX_M           0x20000022
#define MASK_VLT_B_VX_M            0xfe00303f
#define MATCH_VLT_B_U_VV_M         0x24000020
#define MASK_VLT_B_U_VV_M          0xfc00303f
#define MATCH_VLT_B_U_VX_M         0x24000022
#define MASK_VLT_B_U_VX_M          0xfe00303f
#define MATCH_VLT_H_VV             0x20001000
#define MASK_VLT_H_VV              0xfc00303f
#define MATCH_VLT_H_VX             0x20001002
#define MASK_VLT_H_VX              0xfe00303f
#define MATCH_VLT_H_U_VV           0x24001000
#define MASK_VLT_H_U_VV            0xfc00303f
#define MATCH_VLT_H_U_VX           0x24001002
#define MASK_VLT_H_U_VX            0xfe00303f
#define MATCH_VLT_H_VV_M           0x20001020
#define MASK_VLT_H_VV_M            0xfc00303f
#define MATCH_VLT_H_VX_M           0x20001022
#define MASK_VLT_H_VX_M            0xfe00303f
#define MATCH_VLT_H_U_VV_M         0x24001020
#define MASK_VLT_H_U_VV_M          0xfc00303f
#define MATCH_VLT_H_U_VX_M         0x24001022
#define MASK_VLT_H_U_VX_M          0xfe00303f
#define MATCH_VLT_W_VV             0x20002000
#define MASK_VLT_W_VV              0xfc00303f
#define MATCH_VLT_W_VX             0x20002002
#define MASK_VLT_W_VX              0xfe00303f
#define MATCH_VLT_W_U_VV           0x24002000
#define MASK_VLT_W_U_VV            0xfc00303f
#define MATCH_VLT_W_U_VX           0x24002002
#define MASK_VLT_W_U_VX            0xfe00303f
#define MATCH_VLT_W_VV_M           0x20002020
#define MASK_VLT_W_VV_M            0xfc00303f
#define MATCH_VLT_W_VX_M           0x20002022
#define MASK_VLT_W_VX_M            0xfe00303f
#define MATCH_VLT_W_U_VV_M         0x24002020
#define MASK_VLT_W_U_VV_M          0xfc00303f
#define MATCH_VLT_W_U_VX_M         0x24002022
#define MASK_VLT_W_U_VX_M          0xfe00303f
#define MATCH_VLE_B_VV             0x28000000
#define MASK_VLE_B_VV              0xfc00303f
#define MATCH_VLE_B_VX             0x28000002
#define MASK_VLE_B_VX              0xfe00303f
#define MATCH_VLE_B_U_VV           0x2c000000
#define MASK_VLE_B_U_VV            0xfc00303f
#define MATCH_VLE_B_U_VX           0x2c000002
#define MASK_VLE_B_U_VX            0xfe00303f
#define MATCH_VLE_B_VV_M           0x28000020
#define MASK_VLE_B_VV_M            0xfc00303f
#define MATCH_VLE_B_VX_M           0x28000022
#define MASK_VLE_B_VX_M            0xfe00303f
#define MATCH_VLE_B_U_VV_M         0x2c000020
#define MASK_VLE_B_U_VV_M          0xfc00303f
#define MATCH_VLE_B_U_VX_M         0x2c000022
#define MASK_VLE_B_U_VX_M          0xfe00303f
#define MATCH_VLE_H_VV             0x28001000
#define MASK_VLE_H_VV              0xfc00303f
#define MATCH_VLE_H_VX             0x28001002
#define MASK_VLE_H_VX              0xfe00303f
#define MATCH_VLE_H_U_VV           0x2c001000
#define MASK_VLE_H_U_VV            0xfc00303f
#define MATCH_VLE_H_U_VX           0x2c001002
#define MASK_VLE_H_U_VX            0xfe00303f
#define MATCH_VLE_H_VV_M           0x28001020
#define MASK_VLE_H_VV_M            0xfc00303f
#define MATCH_VLE_H_VX_M           0x28001022
#define MASK_VLE_H_VX_M            0xfe00303f
#define MATCH_VLE_H_U_VV_M         0x2c001020
#define MASK_VLE_H_U_VV_M          0xfc00303f
#define MATCH_VLE_H_U_VX_M         0x2c001022
#define MASK_VLE_H_U_VX_M          0xfe00303f
#define MATCH_VLE_W_VV             0x28002000
#define MASK_VLE_W_VV              0xfc00303f
#define MATCH_VLE_W_VX             0x28002002
#define MASK_VLE_W_VX              0xfe00303f
#define MATCH_VLE_W_U_VV           0x2c002000
#define MASK_VLE_W_U_VV            0xfc00303f
#define MATCH_VLE_W_U_VX           0x2c002002
#define MASK_VLE_W_U_VX            0xfe00303f
#define MATCH_VLE_W_VV_M           0x28002020
#define MASK_VLE_W_VV_M            0xfc00303f
#define MATCH_VLE_W_VX_M           0x28002022
#define MASK_VLE_W_VX_M            0xfe00303f
#define MATCH_VLE_W_U_VV_M         0x2c002020
#define MASK_VLE_W_U_VV_M          0xfc00303f
#define MATCH_VLE_W_U_VX_M         0x2c002022
#define MASK_VLE_W_U_VX_M          0xfe00303f
#define MATCH_VGT_B_VV             0x30000000
#define MASK_VGT_B_VV              0xfc00303f
#define MATCH_VGT_B_VX             0x30000002
#define MASK_VGT_B_VX              0xfe00303f
#define MATCH_VGT_B_U_VV           0x34000000
#define MASK_VGT_B_U_VV            0xfc00303f
#define MATCH_VGT_B_U_VX           0x34000002
#define MASK_VGT_B_U_VX            0xfe00303f
#define MATCH_VGT_B_VV_M           0x30000020
#define MASK_VGT_B_VV_M            0xfc00303f
#define MATCH_VGT_B_VX_M           0x30000022
#define MASK_VGT_B_VX_M            0xfe00303f
#define MATCH_VGT_B_U_VV_M         0x34000020
#define MASK_VGT_B_U_VV_M          0xfc00303f
#define MATCH_VGT_B_U_VX_M         0x34000022
#define MASK_VGT_B_U_VX_M          0xfe00303f
#define MATCH_VGT_H_VV             0x30001000
#define MASK_VGT_H_VV              0xfc00303f
#define MATCH_VGT_H_VX             0x30001002
#define MASK_VGT_H_VX              0xfe00303f
#define MATCH_VGT_H_U_VV           0x34001000
#define MASK_VGT_H_U_VV            0xfc00303f
#define MATCH_VGT_H_U_VX           0x34001002
#define MASK_VGT_H_U_VX            0xfe00303f
#define MATCH_VGT_H_VV_M           0x30001020
#define MASK_VGT_H_VV_M            0xfc00303f
#define MATCH_VGT_H_VX_M           0x30001022
#define MASK_VGT_H_VX_M            0xfe00303f
#define MATCH_VGT_H_U_VV_M         0x34001020
#define MASK_VGT_H_U_VV_M          0xfc00303f
#define MATCH_VGT_H_U_VX_M         0x34001022
#define MASK_VGT_H_U_VX_M          0xfe00303f
#define MATCH_VGT_W_VV             0x30002000
#define MASK_VGT_W_VV              0xfc00303f
#define MATCH_VGT_W_VX             0x30002002
#define MASK_VGT_W_VX              0xfe00303f
#define MATCH_VGT_W_U_VV           0x34002000
#define MASK_VGT_W_U_VV            0xfc00303f
#define MATCH_VGT_W_U_VX           0x34002002
#define MASK_VGT_W_U_VX            0xfe00303f
#define MATCH_VGT_W_VV_M           0x30002020
#define MASK_VGT_W_VV_M            0xfc00303f
#define MATCH_VGT_W_VX_M           0x30002022
#define MASK_VGT_W_VX_M            0xfe00303f
#define MATCH_VGT_W_U_VV_M         0x34002020
#define MASK_VGT_W_U_VV_M          0xfc00303f
#define MATCH_VGT_W_U_VX_M         0x34002022
#define MASK_VGT_W_U_VX_M          0xfe00303f
#define MATCH_VGE_B_VV             0x38000000
#define MASK_VGE_B_VV              0xfc00303f
#define MATCH_VGE_B_VX             0x38000002
#define MASK_VGE_B_VX              0xfe00303f
#define MATCH_VGE_B_U_VV           0x3c000000
#define MASK_VGE_B_U_VV            0xfc00303f
#define MATCH_VGE_B_U_VX           0x3c000002
#define MASK_VGE_B_U_VX            0xfe00303f
#define MATCH_VGE_B_VV_M           0x38000020
#define MASK_VGE_B_VV_M            0xfc00303f
#define MATCH_VGE_B_VX_M           0x38000022
#define MASK_VGE_B_VX_M            0xfe00303f
#define MATCH_VGE_B_U_VV_M         0x3c000020
#define MASK_VGE_B_U_VV_M          0xfc00303f
#define MATCH_VGE_B_U_VX_M         0x3c000022
#define MASK_VGE_B_U_VX_M          0xfe00303f
#define MATCH_VGE_H_VV             0x38001000
#define MASK_VGE_H_VV              0xfc00303f
#define MATCH_VGE_H_VX             0x38001002
#define MASK_VGE_H_VX              0xfe00303f
#define MATCH_VGE_H_U_VV           0x3c001000
#define MASK_VGE_H_U_VV            0xfc00303f
#define MATCH_VGE_H_U_VX           0x3c001002
#define MASK_VGE_H_U_VX            0xfe00303f
#define MATCH_VGE_H_VV_M           0x38001020
#define MASK_VGE_H_VV_M            0xfc00303f
#define MATCH_VGE_H_VX_M           0x38001022
#define MASK_VGE_H_VX_M            0xfe00303f
#define MATCH_VGE_H_U_VV_M         0x3c001020
#define MASK_VGE_H_U_VV_M          0xfc00303f
#define MATCH_VGE_H_U_VX_M         0x3c001022
#define MASK_VGE_H_U_VX_M          0xfe00303f
#define MATCH_VGE_W_VV             0x38002000
#define MASK_VGE_W_VV              0xfc00303f
#define MATCH_VGE_W_VX             0x38002002
#define MASK_VGE_W_VX              0xfe00303f
#define MATCH_VGE_W_U_VV           0x3c002000
#define MASK_VGE_W_U_VV            0xfc00303f
#define MATCH_VGE_W_U_VX           0x3c002002
#define MASK_VGE_W_U_VX            0xfe00303f
#define MATCH_VGE_W_VV_M           0x38002020
#define MASK_VGE_W_VV_M            0xfc00303f
#define MATCH_VGE_W_VX_M           0x38002022
#define MASK_VGE_W_VX_M            0xfe00303f
#define MATCH_VGE_W_U_VV_M         0x3c002020
#define MASK_VGE_W_U_VV_M          0xfc00303f
#define MATCH_VGE_W_U_VX_M         0x3c002022
#define MASK_VGE_W_U_VX_M          0xfe00303f
#define MATCH_VABSD_B_VV           0x40000000
#define MASK_VABSD_B_VV            0xfc00303f
#define MATCH_VABSD_B_VX           0x40000002
#define MASK_VABSD_B_VX            0xfe00303f
#define MATCH_VABSD_B_U_VV         0x44000000
#define MASK_VABSD_B_U_VV          0xfc00303f
#define MATCH_VABSD_B_U_VX         0x44000002
#define MASK_VABSD_B_U_VX          0xfe00303f
#define MATCH_VABSD_B_VV_M         0x40000020
#define MASK_VABSD_B_VV_M          0xfc00303f
#define MATCH_VABSD_B_VX_M         0x40000022
#define MASK_VABSD_B_VX_M          0xfe00303f
#define MATCH_VABSD_B_U_VV_M       0x44000020
#define MASK_VABSD_B_U_VV_M        0xfc00303f
#define MATCH_VABSD_B_U_VX_M       0x44000022
#define MASK_VABSD_B_U_VX_M        0xfe00303f
#define MATCH_VABSD_H_VV           0x40001000
#define MASK_VABSD_H_VV            0xfc00303f
#define MATCH_VABSD_H_VX           0x40001002
#define MASK_VABSD_H_VX            0xfe00303f
#define MATCH_VABSD_H_U_VV         0x44001000
#define MASK_VABSD_H_U_VV          0xfc00303f
#define MATCH_VABSD_H_U_VX         0x44001002
#define MASK_VABSD_H_U_VX          0xfe00303f
#define MATCH_VABSD_H_VV_M         0x40001020
#define MASK_VABSD_H_VV_M          0xfc00303f
#define MATCH_VABSD_H_VX_M         0x40001022
#define MASK_VABSD_H_VX_M          0xfe00303f
#define MATCH_VABSD_H_U_VV_M       0x44001020
#define MASK_VABSD_H_U_VV_M        0xfc00303f
#define MATCH_VABSD_H_U_VX_M       0x44001022
#define MASK_VABSD_H_U_VX_M        0xfe00303f
#define MATCH_VABSD_W_VV           0x40002000
#define MASK_VABSD_W_VV            0xfc00303f
#define MATCH_VABSD_W_VX           0x40002002
#define MASK_VABSD_W_VX            0xfe00303f
#define MATCH_VABSD_W_U_VV         0x44002000
#define MASK_VABSD_W_U_VV          0xfc00303f
#define MATCH_VABSD_W_U_VX         0x44002002
#define MASK_VABSD_W_U_VX          0xfe00303f
#define MATCH_VABSD_W_VV_M         0x40002020
#define MASK_VABSD_W_VV_M          0xfc00303f
#define MATCH_VABSD_W_VX_M         0x40002022
#define MASK_VABSD_W_VX_M          0xfe00303f
#define MATCH_VABSD_W_U_VV_M       0x44002020
#define MASK_VABSD_W_U_VV_M        0xfc00303f
#define MATCH_VABSD_W_U_VX_M       0x44002022
#define MASK_VABSD_W_U_VX_M        0xfe00303f
#define MATCH_VMAX_B_VV            0x48000000
#define MASK_VMAX_B_VV             0xfc00303f
#define MATCH_VMAX_B_VX            0x48000002
#define MASK_VMAX_B_VX             0xfe00303f
#define MATCH_VMAX_B_U_VV          0x4c000000
#define MASK_VMAX_B_U_VV           0xfc00303f
#define MATCH_VMAX_B_U_VX          0x4c000002
#define MASK_VMAX_B_U_VX           0xfe00303f
#define MATCH_VMAX_B_VV_M          0x48000020
#define MASK_VMAX_B_VV_M           0xfc00303f
#define MATCH_VMAX_B_VX_M          0x48000022
#define MASK_VMAX_B_VX_M           0xfe00303f
#define MATCH_VMAX_B_U_VV_M        0x4c000020
#define MASK_VMAX_B_U_VV_M         0xfc00303f
#define MATCH_VMAX_B_U_VX_M        0x4c000022
#define MASK_VMAX_B_U_VX_M         0xfe00303f
#define MATCH_VMAX_H_VV            0x48001000
#define MASK_VMAX_H_VV             0xfc00303f
#define MATCH_VMAX_H_VX            0x48001002
#define MASK_VMAX_H_VX             0xfe00303f
#define MATCH_VMAX_H_U_VV          0x4c001000
#define MASK_VMAX_H_U_VV           0xfc00303f
#define MATCH_VMAX_H_U_VX          0x4c001002
#define MASK_VMAX_H_U_VX           0xfe00303f
#define MATCH_VMAX_H_VV_M          0x48001020
#define MASK_VMAX_H_VV_M           0xfc00303f
#define MATCH_VMAX_H_VX_M          0x48001022
#define MASK_VMAX_H_VX_M           0xfe00303f
#define MATCH_VMAX_H_U_VV_M        0x4c001020
#define MASK_VMAX_H_U_VV_M         0xfc00303f
#define MATCH_VMAX_H_U_VX_M        0x4c001022
#define MASK_VMAX_H_U_VX_M         0xfe00303f
#define MATCH_VMAX_W_VV            0x48002000
#define MASK_VMAX_W_VV             0xfc00303f
#define MATCH_VMAX_W_VX            0x48002002
#define MASK_VMAX_W_VX             0xfe00303f
#define MATCH_VMAX_W_U_VV          0x4c002000
#define MASK_VMAX_W_U_VV           0xfc00303f
#define MATCH_VMAX_W_U_VX          0x4c002002
#define MASK_VMAX_W_U_VX           0xfe00303f
#define MATCH_VMAX_W_VV_M          0x48002020
#define MASK_VMAX_W_VV_M           0xfc00303f
#define MATCH_VMAX_W_VX_M          0x48002022
#define MASK_VMAX_W_VX_M           0xfe00303f
#define MATCH_VMAX_W_U_VV_M        0x4c002020
#define MASK_VMAX_W_U_VV_M         0xfc00303f
#define MATCH_VMAX_W_U_VX_M        0x4c002022
#define MASK_VMAX_W_U_VX_M         0xfe00303f
#define MATCH_VMIN_B_VV            0x50000000
#define MASK_VMIN_B_VV             0xfc00303f
#define MATCH_VMIN_B_VX            0x50000002
#define MASK_VMIN_B_VX             0xfe00303f
#define MATCH_VMIN_B_U_VV          0x54000000
#define MASK_VMIN_B_U_VV           0xfc00303f
#define MATCH_VMIN_B_U_VX          0x54000002
#define MASK_VMIN_B_U_VX           0xfe00303f
#define MATCH_VMIN_B_VV_M          0x50000020
#define MASK_VMIN_B_VV_M           0xfc00303f
#define MATCH_VMIN_B_VX_M          0x50000022
#define MASK_VMIN_B_VX_M           0xfe00303f
#define MATCH_VMIN_B_U_VV_M        0x54000020
#define MASK_VMIN_B_U_VV_M         0xfc00303f
#define MATCH_VMIN_B_U_VX_M        0x54000022
#define MASK_VMIN_B_U_VX_M         0xfe00303f
#define MATCH_VMIN_H_VV            0x50001000
#define MASK_VMIN_H_VV             0xfc00303f
#define MATCH_VMIN_H_VX            0x50001002
#define MASK_VMIN_H_VX             0xfe00303f
#define MATCH_VMIN_H_U_VV          0x54001000
#define MASK_VMIN_H_U_VV           0xfc00303f
#define MATCH_VMIN_H_U_VX          0x54001002
#define MASK_VMIN_H_U_VX           0xfe00303f
#define MATCH_VMIN_H_VV_M          0x50001020
#define MASK_VMIN_H_VV_M           0xfc00303f
#define MATCH_VMIN_H_VX_M          0x50001022
#define MASK_VMIN_H_VX_M           0xfe00303f
#define MATCH_VMIN_H_U_VV_M        0x54001020
#define MASK_VMIN_H_U_VV_M         0xfc00303f
#define MATCH_VMIN_H_U_VX_M        0x54001022
#define MASK_VMIN_H_U_VX_M         0xfe00303f
#define MATCH_VMIN_W_VV            0x50002000
#define MASK_VMIN_W_VV             0xfc00303f
#define MATCH_VMIN_W_VX            0x50002002
#define MASK_VMIN_W_VX             0xfe00303f
#define MATCH_VMIN_W_U_VV          0x54002000
#define MASK_VMIN_W_U_VV           0xfc00303f
#define MATCH_VMIN_W_U_VX          0x54002002
#define MASK_VMIN_W_U_VX           0xfe00303f
#define MATCH_VMIN_W_VV_M          0x50002020
#define MASK_VMIN_W_VV_M           0xfc00303f
#define MATCH_VMIN_W_VX_M          0x50002022
#define MASK_VMIN_W_VX_M           0xfe00303f
#define MATCH_VMIN_W_U_VV_M        0x54002020
#define MASK_VMIN_W_U_VV_M         0xfc00303f
#define MATCH_VMIN_W_U_VX_M        0x54002022
#define MASK_VMIN_W_U_VX_M         0xfe00303f
#define MATCH_VADD3_B_VV           0x60000000
#define MASK_VADD3_B_VV            0xfc00303f
#define MATCH_VADD3_B_VX           0x60000002
#define MASK_VADD3_B_VX            0xfe00303f
#define MATCH_VADD3_B_VV_M         0x60000020
#define MASK_VADD3_B_VV_M          0xfc00303f
#define MATCH_VADD3_B_VX_M         0x60000022
#define MASK_VADD3_B_VX_M          0xfe00303f
#define MATCH_VADD3_H_VV           0x60001000
#define MASK_VADD3_H_VV            0xfc00303f
#define MATCH_VADD3_H_VX           0x60001002
#define MASK_VADD3_H_VX            0xfe00303f
#define MATCH_VADD3_H_VV_M         0x60001020
#define MASK_VADD3_H_VV_M          0xfc00303f
#define MATCH_VADD3_H_VX_M         0x60001022
#define MASK_VADD3_H_VX_M          0xfe00303f
#define MATCH_VADD3_W_VV           0x60002000
#define MASK_VADD3_W_VV            0xfc00303f
#define MATCH_VADD3_W_VX           0x60002002
#define MASK_VADD3_W_VX            0xfe00303f
#define MATCH_VADD3_W_VV_M         0x60002020
#define MASK_VADD3_W_VV_M          0xfc00303f
#define MATCH_VADD3_W_VX_M         0x60002022
#define MASK_VADD3_W_VX_M          0xfe00303f

// 100 Arithmetic2
#define MATCH_VADDS_B_VV           0x00000010
#define MASK_VADDS_B_VV            0xfc00303f
#define MATCH_VADDS_B_VX           0x00000012
#define MASK_VADDS_B_VX            0xfe00303f
#define MATCH_VADDS_B_U_VV         0x04000010
#define MASK_VADDS_B_U_VV          0xfc00303f
#define MATCH_VADDS_B_U_VX         0x04000012
#define MASK_VADDS_B_U_VX          0xfe00303f
#define MATCH_VADDS_B_VV_M         0x00000030
#define MASK_VADDS_B_VV_M          0xfc00303f
#define MATCH_VADDS_B_VX_M         0x00000032
#define MASK_VADDS_B_VX_M          0xfe00303f
#define MATCH_VADDS_B_U_VV_M       0x04000030
#define MASK_VADDS_B_U_VV_M        0xfc00303f
#define MATCH_VADDS_B_U_VX_M       0x04000032
#define MASK_VADDS_B_U_VX_M        0xfe00303f
#define MATCH_VADDS_H_VV           0x00001010
#define MASK_VADDS_H_VV            0xfc00303f
#define MATCH_VADDS_H_VX           0x00001012
#define MASK_VADDS_H_VX            0xfe00303f
#define MATCH_VADDS_H_U_VV         0x04001010
#define MASK_VADDS_H_U_VV          0xfc00303f
#define MATCH_VADDS_H_U_VX         0x04001012
#define MASK_VADDS_H_U_VX          0xfe00303f
#define MATCH_VADDS_H_VV_M         0x00001030
#define MASK_VADDS_H_VV_M          0xfc00303f
#define MATCH_VADDS_H_VX_M         0x00001032
#define MASK_VADDS_H_VX_M          0xfe00303f
#define MATCH_VADDS_H_U_VV_M       0x04001030
#define MASK_VADDS_H_U_VV_M        0xfc00303f
#define MATCH_VADDS_H_U_VX_M       0x04001032
#define MASK_VADDS_H_U_VX_M        0xfe00303f
#define MATCH_VADDS_W_VV           0x00002010
#define MASK_VADDS_W_VV            0xfc00303f
#define MATCH_VADDS_W_VX           0x00002012
#define MASK_VADDS_W_VX            0xfe00303f
#define MATCH_VADDS_W_U_VV         0x04002010
#define MASK_VADDS_W_U_VV          0xfc00303f
#define MATCH_VADDS_W_U_VX         0x04002012
#define MASK_VADDS_W_U_VX          0xfe00303f
#define MATCH_VADDS_W_VV_M         0x00002030
#define MASK_VADDS_W_VV_M          0xfc00303f
#define MATCH_VADDS_W_VX_M         0x00002032
#define MASK_VADDS_W_VX_M          0xfe00303f
#define MATCH_VADDS_W_U_VV_M       0x04002030
#define MASK_VADDS_W_U_VV_M        0xfc00303f
#define MATCH_VADDS_W_U_VX_M       0x04002032
#define MASK_VADDS_W_U_VX_M        0xfe00303f
#define MATCH_VSUBS_B_VV           0x08000010
#define MASK_VSUBS_B_VV            0xfc00303f
#define MATCH_VSUBS_B_VX           0x08000012
#define MASK_VSUBS_B_VX            0xfe00303f
#define MATCH_VSUBS_B_U_VV         0x0c000010
#define MASK_VSUBS_B_U_VV          0xfc00303f
#define MATCH_VSUBS_B_U_VX         0x0c000012
#define MASK_VSUBS_B_U_VX          0xfe00303f
#define MATCH_VSUBS_B_VV_M         0x08000030
#define MASK_VSUBS_B_VV_M          0xfc00303f
#define MATCH_VSUBS_B_VX_M         0x08000032
#define MASK_VSUBS_B_VX_M          0xfe00303f
#define MATCH_VSUBS_B_U_VV_M       0x0c000030
#define MASK_VSUBS_B_U_VV_M        0xfc00303f
#define MATCH_VSUBS_B_U_VX_M       0x0c000032
#define MASK_VSUBS_B_U_VX_M        0xfe00303f
#define MATCH_VSUBS_H_VV           0x08001010
#define MASK_VSUBS_H_VV            0xfc00303f
#define MATCH_VSUBS_H_VX           0x08001012
#define MASK_VSUBS_H_VX            0xfe00303f
#define MATCH_VSUBS_H_U_VV         0x0c001010
#define MASK_VSUBS_H_U_VV          0xfc00303f
#define MATCH_VSUBS_H_U_VX         0x0c001012
#define MASK_VSUBS_H_U_VX          0xfe00303f
#define MATCH_VSUBS_H_VV_M         0x08001030
#define MASK_VSUBS_H_VV_M          0xfc00303f
#define MATCH_VSUBS_H_VX_M         0x08001032
#define MASK_VSUBS_H_VX_M          0xfe00303f
#define MATCH_VSUBS_H_U_VV_M       0x0c001030
#define MASK_VSUBS_H_U_VV_M        0xfc00303f
#define MATCH_VSUBS_H_U_VX_M       0x0c001032
#define MASK_VSUBS_H_U_VX_M        0xfe00303f
#define MATCH_VSUBS_W_VV           0x08002010
#define MASK_VSUBS_W_VV            0xfc00303f
#define MATCH_VSUBS_W_VX           0x08002012
#define MASK_VSUBS_W_VX            0xfe00303f
#define MATCH_VSUBS_W_U_VV         0x0c002010
#define MASK_VSUBS_W_U_VV          0xfc00303f
#define MATCH_VSUBS_W_U_VX         0x0c002012
#define MASK_VSUBS_W_U_VX          0xfe00303f
#define MATCH_VSUBS_W_VV_M         0x08002030
#define MASK_VSUBS_W_VV_M          0xfc00303f
#define MATCH_VSUBS_W_VX_M         0x08002032
#define MASK_VSUBS_W_VX_M          0xfe00303f
#define MATCH_VSUBS_W_U_VV_M       0x0c002030
#define MASK_VSUBS_W_U_VV_M        0xfc00303f
#define MATCH_VSUBS_W_U_VX_M       0x0c002032
#define MASK_VSUBS_W_U_VX_M        0xfe00303f
#define MATCH_VADDW_H_VV           0x10001010
#define MASK_VADDW_H_VV            0xfc00303f
#define MATCH_VADDW_H_VX           0x10001012
#define MASK_VADDW_H_VX            0xfe00303f
#define MATCH_VADDW_H_U_VV         0x14001010
#define MASK_VADDW_H_U_VV          0xfc00303f
#define MATCH_VADDW_H_U_VX         0x14001012
#define MASK_VADDW_H_U_VX          0xfe00303f
#define MATCH_VADDW_H_VV_M         0x10001030
#define MASK_VADDW_H_VV_M          0xfc00303f
#define MATCH_VADDW_H_VX_M         0x10001032
#define MASK_VADDW_H_VX_M          0xfe00303f
#define MATCH_VADDW_H_U_VV_M       0x14001030
#define MASK_VADDW_H_U_VV_M        0xfc00303f
#define MATCH_VADDW_H_U_VX_M       0x14001032
#define MASK_VADDW_H_U_VX_M        0xfe00303f
#define MATCH_VADDW_W_VV           0x10002010
#define MASK_VADDW_W_VV            0xfc00303f
#define MATCH_VADDW_W_VX           0x10002012
#define MASK_VADDW_W_VX            0xfe00303f
#define MATCH_VADDW_W_U_VV         0x14002010
#define MASK_VADDW_W_U_VV          0xfc00303f
#define MATCH_VADDW_W_U_VX         0x14002012
#define MASK_VADDW_W_U_VX          0xfe00303f
#define MATCH_VADDW_W_VV_M         0x10002030
#define MASK_VADDW_W_VV_M          0xfc00303f
#define MATCH_VADDW_W_VX_M         0x10002032
#define MASK_VADDW_W_VX_M          0xfe00303f
#define MATCH_VADDW_W_U_VV_M       0x14002030
#define MASK_VADDW_W_U_VV_M        0xfc00303f
#define MATCH_VADDW_W_U_VX_M       0x14002032
#define MASK_VADDW_W_U_VX_M        0xfe00303f
#define MATCH_VSUBW_H_VV           0x18001010
#define MASK_VSUBW_H_VV            0xfc00303f
#define MATCH_VSUBW_H_VX           0x18001012
#define MASK_VSUBW_H_VX            0xfe00303f
#define MATCH_VSUBW_H_U_VV         0x1c001010
#define MASK_VSUBW_H_U_VV          0xfc00303f
#define MATCH_VSUBW_H_U_VX         0x1c001012
#define MASK_VSUBW_H_U_VX          0xfe00303f
#define MATCH_VSUBW_H_VV_M         0x18001030
#define MASK_VSUBW_H_VV_M          0xfc00303f
#define MATCH_VSUBW_H_VX_M         0x18001032
#define MASK_VSUBW_H_VX_M          0xfe00303f
#define MATCH_VSUBW_H_U_VV_M       0x1c001030
#define MASK_VSUBW_H_U_VV_M        0xfc00303f
#define MATCH_VSUBW_H_U_VX_M       0x1c001032
#define MASK_VSUBW_H_U_VX_M        0xfe00303f
#define MATCH_VSUBW_W_VV           0x18002010
#define MASK_VSUBW_W_VV            0xfc00303f
#define MATCH_VSUBW_W_VX           0x18002012
#define MASK_VSUBW_W_VX            0xfe00303f
#define MATCH_VSUBW_W_U_VV         0x1c002010
#define MASK_VSUBW_W_U_VV          0xfc00303f
#define MATCH_VSUBW_W_U_VX         0x1c002012
#define MASK_VSUBW_W_U_VX          0xfe00303f
#define MATCH_VSUBW_W_VV_M         0x18002030
#define MASK_VSUBW_W_VV_M          0xfc00303f
#define MATCH_VSUBW_W_VX_M         0x18002032
#define MASK_VSUBW_W_VX_M          0xfe00303f
#define MATCH_VSUBW_W_U_VV_M       0x1c002030
#define MASK_VSUBW_W_U_VV_M        0xfc00303f
#define MATCH_VSUBW_W_U_VX_M       0x1c002032
#define MASK_VSUBW_W_U_VX_M        0xfe00303f
#define MATCH_VACC_H_VV            0x28001010
#define MASK_VACC_H_VV             0xfc00303f
#define MATCH_VACC_H_VX            0x28001012
#define MASK_VACC_H_VX             0xfe00303f
#define MATCH_VACC_H_U_VV          0x2c001010
#define MASK_VACC_H_U_VV           0xfc00303f
#define MATCH_VACC_H_U_VX          0x2c001012
#define MASK_VACC_H_U_VX           0xfe00303f
#define MATCH_VACC_H_VV_M          0x28001030
#define MASK_VACC_H_VV_M           0xfc00303f
#define MATCH_VACC_H_VX_M          0x28001032
#define MASK_VACC_H_VX_M           0xfe00303f
#define MATCH_VACC_H_U_VV_M        0x2c001030
#define MASK_VACC_H_U_VV_M         0xfc00303f
#define MATCH_VACC_H_U_VX_M        0x2c001032
#define MASK_VACC_H_U_VX_M         0xfe00303f
#define MATCH_VACC_W_VV            0x28002010
#define MASK_VACC_W_VV             0xfc00303f
#define MATCH_VACC_W_VX            0x28002012
#define MASK_VACC_W_VX             0xfe00303f
#define MATCH_VACC_W_U_VV          0x2c002010
#define MASK_VACC_W_U_VV           0xfc00303f
#define MATCH_VACC_W_U_VX          0x2c002012
#define MASK_VACC_W_U_VX           0xfe00303f
#define MATCH_VACC_W_VV_M          0x28002030
#define MASK_VACC_W_VV_M           0xfc00303f
#define MATCH_VACC_W_VX_M          0x28002032
#define MASK_VACC_W_VX_M           0xfe00303f
#define MATCH_VACC_W_U_VV_M        0x2c002030
#define MASK_VACC_W_U_VV_M         0xfc00303f
#define MATCH_VACC_W_U_VX_M        0x2c002032
#define MASK_VACC_W_U_VX_M         0xfe00303f
#define MATCH_VPADD_H_V            0x30001012
#define MASK_VPADD_H_V             0xfff0303f
#define MATCH_VPADD_H_U_V          0x34001012
#define MASK_VPADD_H_U_V           0xfff0303f
#define MATCH_VPADD_H_V_M          0x30001032
#define MASK_VPADD_H_V_M           0xfff0303f
#define MATCH_VPADD_H_U_V_M        0x34001032
#define MASK_VPADD_H_U_V_M         0xfff0303f
#define MATCH_VPADD_W_V            0x30002012
#define MASK_VPADD_W_V             0xfff0303f
#define MATCH_VPADD_W_U_V          0x34002012
#define MASK_VPADD_W_U_V           0xfff0303f
#define MATCH_VPADD_W_V_M          0x30002032
#define MASK_VPADD_W_V_M           0xfff0303f
#define MATCH_VPADD_W_U_V_M        0x34002032
#define MASK_VPADD_W_U_V_M         0xfff0303f
#define MATCH_VPSUB_H_V            0x38001012
#define MASK_VPSUB_H_V             0xfff0303f
#define MATCH_VPSUB_H_U_V          0x3c001012
#define MASK_VPSUB_H_U_V           0xfff0303f
#define MATCH_VPSUB_H_V_M          0x38001032
#define MASK_VPSUB_H_V_M           0xfff0303f
#define MATCH_VPSUB_H_U_V_M        0x3c001032
#define MASK_VPSUB_H_U_V_M         0xfff0303f
#define MATCH_VPSUB_W_V            0x38002012
#define MASK_VPSUB_W_V             0xfff0303f
#define MATCH_VPSUB_W_U_V          0x3c002012
#define MASK_VPSUB_W_U_V           0xfff0303f
#define MATCH_VPSUB_W_V_M          0x38002032
#define MASK_VPSUB_W_V_M           0xfff0303f
#define MATCH_VPSUB_W_U_V_M        0x3c002032
#define MASK_VPSUB_W_U_V_M         0xfff0303f
#define MATCH_VHADD_B_VV           0x40000010
#define MASK_VHADD_B_VV            0xfc00303f
#define MATCH_VHADD_B_VX           0x40000012
#define MASK_VHADD_B_VX            0xfe00303f
#define MATCH_VHADD_B_R_VV         0x48000010
#define MASK_VHADD_B_R_VV          0xfc00303f
#define MATCH_VHADD_B_R_VX         0x48000012
#define MASK_VHADD_B_R_VX          0xfe00303f
#define MATCH_VHADD_B_U_VV         0x44000010
#define MASK_VHADD_B_U_VV          0xfc00303f
#define MATCH_VHADD_B_U_VX         0x44000012
#define MASK_VHADD_B_U_VX          0xfe00303f
#define MATCH_VHADD_B_UR_VV        0x4c000010
#define MASK_VHADD_B_UR_VV         0xfc00303f
#define MATCH_VHADD_B_UR_VX        0x4c000012
#define MASK_VHADD_B_UR_VX         0xfe00303f
#define MATCH_VHADD_B_VV_M         0x40000030
#define MASK_VHADD_B_VV_M          0xfc00303f
#define MATCH_VHADD_B_VX_M         0x40000032
#define MASK_VHADD_B_VX_M          0xfe00303f
#define MATCH_VHADD_B_R_VV_M       0x48000030
#define MASK_VHADD_B_R_VV_M        0xfc00303f
#define MATCH_VHADD_B_R_VX_M       0x48000032
#define MASK_VHADD_B_R_VX_M        0xfe00303f
#define MATCH_VHADD_B_U_VV_M       0x44000030
#define MASK_VHADD_B_U_VV_M        0xfc00303f
#define MATCH_VHADD_B_U_VX_M       0x44000032
#define MASK_VHADD_B_U_VX_M        0xfe00303f
#define MATCH_VHADD_B_UR_VV_M      0x4c000030
#define MASK_VHADD_B_UR_VV_M       0xfc00303f
#define MATCH_VHADD_B_UR_VX_M      0x4c000032
#define MASK_VHADD_B_UR_VX_M       0xfe00303f
#define MATCH_VHADD_H_VV           0x40001010
#define MASK_VHADD_H_VV            0xfc00303f
#define MATCH_VHADD_H_VX           0x40001012
#define MASK_VHADD_H_VX            0xfe00303f
#define MATCH_VHADD_H_R_VV         0x48001010
#define MASK_VHADD_H_R_VV          0xfc00303f
#define MATCH_VHADD_H_R_VX         0x48001012
#define MASK_VHADD_H_R_VX          0xfe00303f
#define MATCH_VHADD_H_U_VV         0x44001010
#define MASK_VHADD_H_U_VV          0xfc00303f
#define MATCH_VHADD_H_U_VX         0x44001012
#define MASK_VHADD_H_U_VX          0xfe00303f
#define MATCH_VHADD_H_UR_VV        0x4c001010
#define MASK_VHADD_H_UR_VV         0xfc00303f
#define MATCH_VHADD_H_UR_VX        0x4c001012
#define MASK_VHADD_H_UR_VX         0xfe00303f
#define MATCH_VHADD_H_VV_M         0x40001030
#define MASK_VHADD_H_VV_M          0xfc00303f
#define MATCH_VHADD_H_VX_M         0x40001032
#define MASK_VHADD_H_VX_M          0xfe00303f
#define MATCH_VHADD_H_R_VV_M       0x48001030
#define MASK_VHADD_H_R_VV_M        0xfc00303f
#define MATCH_VHADD_H_R_VX_M       0x48001032
#define MASK_VHADD_H_R_VX_M        0xfe00303f
#define MATCH_VHADD_H_U_VV_M       0x44001030
#define MASK_VHADD_H_U_VV_M        0xfc00303f
#define MATCH_VHADD_H_U_VX_M       0x44001032
#define MASK_VHADD_H_U_VX_M        0xfe00303f
#define MATCH_VHADD_H_UR_VV_M      0x4c001030
#define MASK_VHADD_H_UR_VV_M       0xfc00303f
#define MATCH_VHADD_H_UR_VX_M      0x4c001032
#define MASK_VHADD_H_UR_VX_M       0xfe00303f
#define MATCH_VHADD_W_VV           0x40002010
#define MASK_VHADD_W_VV            0xfc00303f
#define MATCH_VHADD_W_VX           0x40002012
#define MASK_VHADD_W_VX            0xfe00303f
#define MATCH_VHADD_W_R_VV         0x48002010
#define MASK_VHADD_W_R_VV          0xfc00303f
#define MATCH_VHADD_W_R_VX         0x48002012
#define MASK_VHADD_W_R_VX          0xfe00303f
#define MATCH_VHADD_W_U_VV         0x44002010
#define MASK_VHADD_W_U_VV          0xfc00303f
#define MATCH_VHADD_W_U_VX         0x44002012
#define MASK_VHADD_W_U_VX          0xfe00303f
#define MATCH_VHADD_W_UR_VV        0x4c002010
#define MASK_VHADD_W_UR_VV         0xfc00303f
#define MATCH_VHADD_W_UR_VX        0x4c002012
#define MASK_VHADD_W_UR_VX         0xfe00303f
#define MATCH_VHADD_W_VV_M         0x40002030
#define MASK_VHADD_W_VV_M          0xfc00303f
#define MATCH_VHADD_W_VX_M         0x40002032
#define MASK_VHADD_W_VX_M          0xfe00303f
#define MATCH_VHADD_W_R_VV_M       0x48002030
#define MASK_VHADD_W_R_VV_M        0xfc00303f
#define MATCH_VHADD_W_R_VX_M       0x48002032
#define MASK_VHADD_W_R_VX_M        0xfe00303f
#define MATCH_VHADD_W_U_VV_M       0x44002030
#define MASK_VHADD_W_U_VV_M        0xfc00303f
#define MATCH_VHADD_W_U_VX_M       0x44002032
#define MASK_VHADD_W_U_VX_M        0xfe00303f
#define MATCH_VHADD_W_UR_VV_M      0x4c002030
#define MASK_VHADD_W_UR_VV_M       0xfc00303f
#define MATCH_VHADD_W_UR_VX_M      0x4c002032
#define MASK_VHADD_W_UR_VX_M       0xfe00303f
#define MATCH_VHSUB_B_VV           0x50000010
#define MASK_VHSUB_B_VV            0xfc00303f
#define MATCH_VHSUB_B_VX           0x50000012
#define MASK_VHSUB_B_VX            0xfe00303f
#define MATCH_VHSUB_B_R_VV         0x58000010
#define MASK_VHSUB_B_R_VV          0xfc00303f
#define MATCH_VHSUB_B_R_VX         0x58000012
#define MASK_VHSUB_B_R_VX          0xfe00303f
#define MATCH_VHSUB_B_U_VV         0x54000010
#define MASK_VHSUB_B_U_VV          0xfc00303f
#define MATCH_VHSUB_B_U_VX         0x54000012
#define MASK_VHSUB_B_U_VX          0xfe00303f
#define MATCH_VHSUB_B_UR_VV        0x5c000010
#define MASK_VHSUB_B_UR_VV         0xfc00303f
#define MATCH_VHSUB_B_UR_VX        0x5c000012
#define MASK_VHSUB_B_UR_VX         0xfe00303f
#define MATCH_VHSUB_B_VV_M         0x50000030
#define MASK_VHSUB_B_VV_M          0xfc00303f
#define MATCH_VHSUB_B_VX_M         0x50000032
#define MASK_VHSUB_B_VX_M          0xfe00303f
#define MATCH_VHSUB_B_R_VV_M       0x58000030
#define MASK_VHSUB_B_R_VV_M        0xfc00303f
#define MATCH_VHSUB_B_R_VX_M       0x58000032
#define MASK_VHSUB_B_R_VX_M        0xfe00303f
#define MATCH_VHSUB_B_U_VV_M       0x54000030
#define MASK_VHSUB_B_U_VV_M        0xfc00303f
#define MATCH_VHSUB_B_U_VX_M       0x54000032
#define MASK_VHSUB_B_U_VX_M        0xfe00303f
#define MATCH_VHSUB_B_UR_VV_M      0x5c000030
#define MASK_VHSUB_B_UR_VV_M       0xfc00303f
#define MATCH_VHSUB_B_UR_VX_M      0x5c000032
#define MASK_VHSUB_B_UR_VX_M       0xfe00303f
#define MATCH_VHSUB_H_VV           0x50001010
#define MASK_VHSUB_H_VV            0xfc00303f
#define MATCH_VHSUB_H_VX           0x50001012
#define MASK_VHSUB_H_VX            0xfe00303f
#define MATCH_VHSUB_H_R_VV         0x58001010
#define MASK_VHSUB_H_R_VV          0xfc00303f
#define MATCH_VHSUB_H_R_VX         0x58001012
#define MASK_VHSUB_H_R_VX          0xfe00303f
#define MATCH_VHSUB_H_U_VV         0x54001010
#define MASK_VHSUB_H_U_VV          0xfc00303f
#define MATCH_VHSUB_H_U_VX         0x54001012
#define MASK_VHSUB_H_U_VX          0xfe00303f
#define MATCH_VHSUB_H_UR_VV        0x5c001010
#define MASK_VHSUB_H_UR_VV         0xfc00303f
#define MATCH_VHSUB_H_UR_VX        0x5c001012
#define MASK_VHSUB_H_UR_VX         0xfe00303f
#define MATCH_VHSUB_H_VV_M         0x50001030
#define MASK_VHSUB_H_VV_M          0xfc00303f
#define MATCH_VHSUB_H_VX_M         0x50001032
#define MASK_VHSUB_H_VX_M          0xfe00303f
#define MATCH_VHSUB_H_R_VV_M       0x58001030
#define MASK_VHSUB_H_R_VV_M        0xfc00303f
#define MATCH_VHSUB_H_R_VX_M       0x58001032
#define MASK_VHSUB_H_R_VX_M        0xfe00303f
#define MATCH_VHSUB_H_U_VV_M       0x54001030
#define MASK_VHSUB_H_U_VV_M        0xfc00303f
#define MATCH_VHSUB_H_U_VX_M       0x54001032
#define MASK_VHSUB_H_U_VX_M        0xfe00303f
#define MATCH_VHSUB_H_UR_VV_M      0x5c001030
#define MASK_VHSUB_H_UR_VV_M       0xfc00303f
#define MATCH_VHSUB_H_UR_VX_M      0x5c001032
#define MASK_VHSUB_H_UR_VX_M       0xfe00303f
#define MATCH_VHSUB_W_VV           0x50002010
#define MASK_VHSUB_W_VV            0xfc00303f
#define MATCH_VHSUB_W_VX           0x50002012
#define MASK_VHSUB_W_VX            0xfe00303f
#define MATCH_VHSUB_W_R_VV         0x58002010
#define MASK_VHSUB_W_R_VV          0xfc00303f
#define MATCH_VHSUB_W_R_VX         0x58002012
#define MASK_VHSUB_W_R_VX          0xfe00303f
#define MATCH_VHSUB_W_U_VV         0x54002010
#define MASK_VHSUB_W_U_VV          0xfc00303f
#define MATCH_VHSUB_W_U_VX         0x54002012
#define MASK_VHSUB_W_U_VX          0xfe00303f
#define MATCH_VHSUB_W_UR_VV        0x5c002010
#define MASK_VHSUB_W_UR_VV         0xfc00303f
#define MATCH_VHSUB_W_UR_VX        0x5c002012
#define MASK_VHSUB_W_UR_VX         0xfe00303f
#define MATCH_VHSUB_W_VV_M         0x50002030
#define MASK_VHSUB_W_VV_M          0xfc00303f
#define MATCH_VHSUB_W_VX_M         0x50002032
#define MASK_VHSUB_W_VX_M          0xfe00303f
#define MATCH_VHSUB_W_R_VV_M       0x58002030
#define MASK_VHSUB_W_R_VV_M        0xfc00303f
#define MATCH_VHSUB_W_R_VX_M       0x58002032
#define MASK_VHSUB_W_R_VX_M        0xfe00303f
#define MATCH_VHSUB_W_U_VV_M       0x54002030
#define MASK_VHSUB_W_U_VV_M        0xfc00303f
#define MATCH_VHSUB_W_U_VX_M       0x54002032
#define MASK_VHSUB_W_U_VX_M        0xfe00303f
#define MATCH_VHSUB_W_UR_VV_M      0x5c002030
#define MASK_VHSUB_W_UR_VV_M       0xfc00303f
#define MATCH_VHSUB_W_UR_VX_M      0x5c002032
#define MASK_VHSUB_W_UR_VX_M       0xfe00303f

// 001 Logical
#define MATCH_VAND_VV              0x00000004
#define MASK_VAND_VV               0xfc00303f
#define MATCH_VAND_B_VX            0x00000006
#define MASK_VAND_B_VX             0xfe00303f
#define MATCH_VAND_VV_M            0x00000024
#define MASK_VAND_VV_M             0xfc00303f
#define MATCH_VAND_B_VX_M          0x00000026
#define MASK_VAND_B_VX_M           0xfe00303f
#define MATCH_VAND_H_VX            0x00001006
#define MASK_VAND_H_VX             0xfe00303f
#define MATCH_VAND_H_VX_M          0x00001026
#define MASK_VAND_H_VX_M           0xfe00303f
#define MATCH_VAND_W_VX            0x00002006
#define MASK_VAND_W_VX             0xfe00303f
#define MATCH_VAND_W_VX_M          0x00002026
#define MASK_VAND_W_VX_M           0xfe00303f
#define MATCH_VOR_VV               0x04000004
#define MASK_VOR_VV                0xfc00303f
#define MATCH_VOR_B_VX             0x04000006
#define MASK_VOR_B_VX              0xfe00303f
#define MATCH_VOR_VV_M             0x04000024
#define MASK_VOR_VV_M              0xfc00303f
#define MATCH_VOR_B_VX_M           0x04000026
#define MASK_VOR_B_VX_M            0xfe00303f
#define MATCH_VOR_H_VX             0x04001006
#define MASK_VOR_H_VX              0xfe00303f
#define MATCH_VOR_H_VX_M           0x04001026
#define MASK_VOR_H_VX_M            0xfe00303f
#define MATCH_VOR_W_VX             0x04002006
#define MASK_VOR_W_VX              0xfe00303f
#define MATCH_VOR_W_VX_M           0x04002026
#define MASK_VOR_W_VX_M            0xfe00303f
#define MATCH_VXOR_VV              0x08000004
#define MASK_VXOR_VV               0xfc00303f
#define MATCH_VXOR_B_VX            0x08000006
#define MASK_VXOR_B_VX             0xfe00303f
#define MATCH_VXOR_VV_M            0x08000024
#define MASK_VXOR_VV_M             0xfc00303f
#define MATCH_VXOR_B_VX_M          0x08000026
#define MASK_VXOR_B_VX_M           0xfe00303f
#define MATCH_VXOR_H_VX            0x08001006
#define MASK_VXOR_H_VX             0xfe00303f
#define MATCH_VXOR_H_VX_M          0x08001026
#define MASK_VXOR_H_VX_M           0xfe00303f
#define MATCH_VXOR_W_VX            0x08002006
#define MASK_VXOR_W_VX             0xfe00303f
#define MATCH_VXOR_W_VX_M          0x08002026
#define MASK_VXOR_W_VX_M           0xfe00303f
#define MATCH_VNOT_V               0x0c000006
#define MASK_VNOT_V                0xfff0303f
#define MATCH_VNOT_V_M             0x0c000026
#define MASK_VNOT_V_M              0xfff0303f
#define MATCH_VREV_B_VV            0x10000004
#define MASK_VREV_B_VV             0xfc00303f
#define MATCH_VREV_B_VX            0x10000006
#define MASK_VREV_B_VX             0xfe00303f
#define MATCH_VREV_B_VV_M          0x10000024
#define MASK_VREV_B_VV_M           0xfc00303f
#define MATCH_VREV_B_VX_M          0x10000026
#define MASK_VREV_B_VX_M           0xfe00303f
#define MATCH_VREV_H_VV            0x10001004
#define MASK_VREV_H_VV             0xfc00303f
#define MATCH_VREV_H_VX            0x10001006
#define MASK_VREV_H_VX             0xfe00303f
#define MATCH_VREV_H_VV_M          0x10001024
#define MASK_VREV_H_VV_M           0xfc00303f
#define MATCH_VREV_H_VX_M          0x10001026
#define MASK_VREV_H_VX_M           0xfe00303f
#define MATCH_VREV_W_VV            0x10002004
#define MASK_VREV_W_VV             0xfc00303f
#define MATCH_VREV_W_VX            0x10002006
#define MASK_VREV_W_VX             0xfe00303f
#define MATCH_VREV_W_VV_M          0x10002024
#define MASK_VREV_W_VV_M           0xfc00303f
#define MATCH_VREV_W_VX_M          0x10002026
#define MASK_VREV_W_VX_M           0xfe00303f
#define MATCH_VROR_B_VV            0x14000004
#define MASK_VROR_B_VV             0xfc00303f
#define MATCH_VROR_B_VX            0x14000006
#define MASK_VROR_B_VX             0xfe00303f
#define MATCH_VROR_B_VV_M          0x14000024
#define MASK_VROR_B_VV_M           0xfc00303f
#define MATCH_VROR_B_VX_M          0x14000026
#define MASK_VROR_B_VX_M           0xfe00303f
#define MATCH_VROR_H_VV            0x14001004
#define MASK_VROR_H_VV             0xfc00303f
#define MATCH_VROR_H_VX            0x14001006
#define MASK_VROR_H_VX             0xfe00303f
#define MATCH_VROR_H_VV_M          0x14001024
#define MASK_VROR_H_VV_M           0xfc00303f
#define MATCH_VROR_H_VX_M          0x14001026
#define MASK_VROR_H_VX_M           0xfe00303f
#define MATCH_VROR_W_VV            0x14002004
#define MASK_VROR_W_VV             0xfc00303f
#define MATCH_VROR_W_VX            0x14002006
#define MASK_VROR_W_VX             0xfe00303f
#define MATCH_VROR_W_VV_M          0x14002024
#define MASK_VROR_W_VV_M           0xfc00303f
#define MATCH_VROR_W_VX_M          0x14002026
#define MASK_VROR_W_VX_M           0xfe00303f
#define MATCH_VCLB_B_V             0x20000006
#define MASK_VCLB_B_V              0xfff0303f
#define MATCH_VCLB_B_V_M           0x20000026
#define MASK_VCLB_B_V_M            0xfff0303f
#define MATCH_VCLB_H_V             0x20001006
#define MASK_VCLB_H_V              0xfff0303f
#define MATCH_VCLB_H_V_M           0x20001026
#define MASK_VCLB_H_V_M            0xfff0303f
#define MATCH_VCLB_W_V             0x20002006
#define MASK_VCLB_W_V              0xfff0303f
#define MATCH_VCLB_W_V_M           0x20002026
#define MASK_VCLB_W_V_M            0xfff0303f
#define MATCH_VCLZ_B_V             0x24000006
#define MASK_VCLZ_B_V              0xfff0303f
#define MATCH_VCLZ_B_V_M           0x24000026
#define MASK_VCLZ_B_V_M            0xfff0303f
#define MATCH_VCLZ_H_V             0x24001006
#define MASK_VCLZ_H_V              0xfff0303f
#define MATCH_VCLZ_H_V_M           0x24001026
#define MASK_VCLZ_H_V_M            0xfff0303f
#define MATCH_VCLZ_W_V             0x24002006
#define MASK_VCLZ_W_V              0xfff0303f
#define MATCH_VCLZ_W_V_M           0x24002026
#define MASK_VCLZ_W_V_M            0xfff0303f
#define MATCH_VCPOP_B_V            0x28000006
#define MASK_VCPOP_B_V             0xfff0303f
#define MATCH_VCPOP_B_V_M          0x28000026
#define MASK_VCPOP_B_V_M           0xfff0303f
#define MATCH_VCPOP_H_V            0x28001006
#define MASK_VCPOP_H_V             0xfff0303f
#define MATCH_VCPOP_H_V_M          0x28001026
#define MASK_VCPOP_H_V_M           0xfff0303f
#define MATCH_VCPOP_W_V            0x28002006
#define MASK_VCPOP_W_V             0xfff0303f
#define MATCH_VCPOP_W_V_M          0x28002026
#define MASK_VCPOP_W_V_M           0xfff0303f
#define MATCH_VMV_V                0x30000006
#define MASK_VMV_V                 0xfff0303f
#define MATCH_VMV_V_M              0x30000026
#define MASK_VMV_V_M               0xfff0303f
#define MATCH_VMVP_VV              0x34000004
#define MASK_VMVP_VV               0xfc00303f
#define MATCH_VMVP_B_VX            0x34000006
#define MASK_VMVP_B_VX             0xfe00303f
#define MATCH_VMVP_VV_M            0x34000024
#define MASK_VMVP_VV_M             0xfc00303f
#define MATCH_VMVP_B_VX_M          0x34000026
#define MASK_VMVP_B_VX_M           0xfe00303f
#define MATCH_VMVP_H_VX            0x34001006
#define MASK_VMVP_H_VX             0xfe00303f
#define MATCH_VMVP_H_VX_M          0x34001026
#define MASK_VMVP_H_VX_M           0xfe00303f
#define MATCH_VMVP_W_VX            0x34002006
#define MASK_VMVP_W_VX             0xfe00303f
#define MATCH_VMVP_W_VX_M          0x34002026
#define MASK_VMVP_W_VX_M           0xfe00303f
#define MATCH_ACSET_V              0x40000006
#define MASK_ACSET_V               0xfff0303f
#define MATCH_ACTR_V               0x44000006
#define MASK_ACTR_V                0xfff0303f
#define MATCH_ADWINIT_V            0x48000006
#define MASK_ADWINIT_V             0xfff0303f

// 010 Shift
#define MATCH_VSLL_B_VV            0x04000008
#define MASK_VSLL_B_VV             0xfc00303f
#define MATCH_VSLL_B_VX            0x0400000a
#define MASK_VSLL_B_VX             0xfe00303f
#define MATCH_VSLL_B_VV_M          0x04000028
#define MASK_VSLL_B_VV_M           0xfc00303f
#define MATCH_VSLL_B_VX_M          0x0400002a
#define MASK_VSLL_B_VX_M           0xfe00303f
#define MATCH_VSLL_H_VV            0x04001008
#define MASK_VSLL_H_VV             0xfc00303f
#define MATCH_VSLL_H_VX            0x0400100a
#define MASK_VSLL_H_VX             0xfe00303f
#define MATCH_VSLL_H_VV_M          0x04001028
#define MASK_VSLL_H_VV_M           0xfc00303f
#define MATCH_VSLL_H_VX_M          0x0400102a
#define MASK_VSLL_H_VX_M           0xfe00303f
#define MATCH_VSLL_W_VV            0x04002008
#define MASK_VSLL_W_VV             0xfc00303f
#define MATCH_VSLL_W_VX            0x0400200a
#define MASK_VSLL_W_VX             0xfe00303f
#define MATCH_VSLL_W_VV_M          0x04002028
#define MASK_VSLL_W_VV_M           0xfc00303f
#define MATCH_VSLL_W_VX_M          0x0400202a
#define MASK_VSLL_W_VX_M           0xfe00303f
#define MATCH_VSRA_B_VV            0x08000008
#define MASK_VSRA_B_VV             0xfc00303f
#define MATCH_VSRA_B_VX            0x0800000a
#define MASK_VSRA_B_VX             0xfe00303f
#define MATCH_VSRA_B_VV_M          0x08000028
#define MASK_VSRA_B_VV_M           0xfc00303f
#define MATCH_VSRA_B_VX_M          0x0800002a
#define MASK_VSRA_B_VX_M           0xfe00303f
#define MATCH_VSRA_H_VV            0x08001008
#define MASK_VSRA_H_VV             0xfc00303f
#define MATCH_VSRA_H_VX            0x0800100a
#define MASK_VSRA_H_VX             0xfe00303f
#define MATCH_VSRA_H_VV_M          0x08001028
#define MASK_VSRA_H_VV_M           0xfc00303f
#define MATCH_VSRA_H_VX_M          0x0800102a
#define MASK_VSRA_H_VX_M           0xfe00303f
#define MATCH_VSRA_W_VV            0x08002008
#define MASK_VSRA_W_VV             0xfc00303f
#define MATCH_VSRA_W_VX            0x0800200a
#define MASK_VSRA_W_VX             0xfe00303f
#define MATCH_VSRA_W_VV_M          0x08002028
#define MASK_VSRA_W_VV_M           0xfc00303f
#define MATCH_VSRA_W_VX_M          0x0800202a
#define MASK_VSRA_W_VX_M           0xfe00303f
#define MATCH_VSRL_B_VV            0x0c000008
#define MASK_VSRL_B_VV             0xfc00303f
#define MATCH_VSRL_B_VX            0x0c00000a
#define MASK_VSRL_B_VX             0xfe00303f
#define MATCH_VSRL_B_VV_M          0x0c000028
#define MASK_VSRL_B_VV_M           0xfc00303f
#define MATCH_VSRL_B_VX_M          0x0c00002a
#define MASK_VSRL_B_VX_M           0xfe00303f
#define MATCH_VSRL_H_VV            0x0c001008
#define MASK_VSRL_H_VV             0xfc00303f
#define MATCH_VSRL_H_VX            0x0c00100a
#define MASK_VSRL_H_VX             0xfe00303f
#define MATCH_VSRL_H_VV_M          0x0c001028
#define MASK_VSRL_H_VV_M           0xfc00303f
#define MATCH_VSRL_H_VX_M          0x0c00102a
#define MASK_VSRL_H_VX_M           0xfe00303f
#define MATCH_VSRL_W_VV            0x0c002008
#define MASK_VSRL_W_VV             0xfc00303f
#define MATCH_VSRL_W_VX            0x0c00200a
#define MASK_VSRL_W_VX             0xfe00303f
#define MATCH_VSRL_W_VV_M          0x0c002028
#define MASK_VSRL_W_VV_M           0xfc00303f
#define MATCH_VSRL_W_VX_M          0x0c00202a
#define MASK_VSRL_W_VX_M           0xfe00303f
#define MATCH_VSHA_B_VV            0x20000008
#define MASK_VSHA_B_VV             0xfc00303f
#define MATCH_VSHA_B_VX            0x2000000a
#define MASK_VSHA_B_VX             0xfe00303f
#define MATCH_VSHA_B_R_VV          0x28000008
#define MASK_VSHA_B_R_VV           0xfc00303f
#define MATCH_VSHA_B_R_VX          0x2800000a
#define MASK_VSHA_B_R_VX           0xfe00303f
#define MATCH_VSHA_B_VV_M          0x20000028
#define MASK_VSHA_B_VV_M           0xfc00303f
#define MATCH_VSHA_B_VX_M          0x2000002a
#define MASK_VSHA_B_VX_M           0xfe00303f
#define MATCH_VSHA_B_R_VV_M        0x28000028
#define MASK_VSHA_B_R_VV_M         0xfc00303f
#define MATCH_VSHA_B_R_VX_M        0x2800002a
#define MASK_VSHA_B_R_VX_M         0xfe00303f
#define MATCH_VSHA_H_VV            0x20001008
#define MASK_VSHA_H_VV             0xfc00303f
#define MATCH_VSHA_H_VX            0x2000100a
#define MASK_VSHA_H_VX             0xfe00303f
#define MATCH_VSHA_H_R_VV          0x28001008
#define MASK_VSHA_H_R_VV           0xfc00303f
#define MATCH_VSHA_H_R_VX          0x2800100a
#define MASK_VSHA_H_R_VX           0xfe00303f
#define MATCH_VSHA_H_VV_M          0x20001028
#define MASK_VSHA_H_VV_M           0xfc00303f
#define MATCH_VSHA_H_VX_M          0x2000102a
#define MASK_VSHA_H_VX_M           0xfe00303f
#define MATCH_VSHA_H_R_VV_M        0x28001028
#define MASK_VSHA_H_R_VV_M         0xfc00303f
#define MATCH_VSHA_H_R_VX_M        0x2800102a
#define MASK_VSHA_H_R_VX_M         0xfe00303f
#define MATCH_VSHA_W_VV            0x20002008
#define MASK_VSHA_W_VV             0xfc00303f
#define MATCH_VSHA_W_VX            0x2000200a
#define MASK_VSHA_W_VX             0xfe00303f
#define MATCH_VSHA_W_R_VV          0x28002008
#define MASK_VSHA_W_R_VV           0xfc00303f
#define MATCH_VSHA_W_R_VX          0x2800200a
#define MASK_VSHA_W_R_VX           0xfe00303f
#define MATCH_VSHA_W_VV_M          0x20002028
#define MASK_VSHA_W_VV_M           0xfc00303f
#define MATCH_VSHA_W_VX_M          0x2000202a
#define MASK_VSHA_W_VX_M           0xfe00303f
#define MATCH_VSHA_W_R_VV_M        0x28002028
#define MASK_VSHA_W_R_VV_M         0xfc00303f
#define MATCH_VSHA_W_R_VX_M        0x2800202a
#define MASK_VSHA_W_R_VX_M         0xfe00303f
#define MATCH_VSHL_B_VV            0x24000008
#define MASK_VSHL_B_VV             0xfc00303f
#define MATCH_VSHL_B_VX            0x2400000a
#define MASK_VSHL_B_VX             0xfe00303f
#define MATCH_VSHL_B_R_VV          0x2c000008
#define MASK_VSHL_B_R_VV           0xfc00303f
#define MATCH_VSHL_B_R_VX          0x2c00000a
#define MASK_VSHL_B_R_VX           0xfe00303f
#define MATCH_VSHL_B_VV_M          0x24000028
#define MASK_VSHL_B_VV_M           0xfc00303f
#define MATCH_VSHL_B_VX_M          0x2400002a
#define MASK_VSHL_B_VX_M           0xfe00303f
#define MATCH_VSHL_B_R_VV_M        0x2c000028
#define MASK_VSHL_B_R_VV_M         0xfc00303f
#define MATCH_VSHL_B_R_VX_M        0x2c00002a
#define MASK_VSHL_B_R_VX_M         0xfe00303f
#define MATCH_VSHL_H_VV            0x24001008
#define MASK_VSHL_H_VV             0xfc00303f
#define MATCH_VSHL_H_VX            0x2400100a
#define MASK_VSHL_H_VX             0xfe00303f
#define MATCH_VSHL_H_R_VV          0x2c001008
#define MASK_VSHL_H_R_VV           0xfc00303f
#define MATCH_VSHL_H_R_VX          0x2c00100a
#define MASK_VSHL_H_R_VX           0xfe00303f
#define MATCH_VSHL_H_VV_M          0x24001028
#define MASK_VSHL_H_VV_M           0xfc00303f
#define MATCH_VSHL_H_VX_M          0x2400102a
#define MASK_VSHL_H_VX_M           0xfe00303f
#define MATCH_VSHL_H_R_VV_M        0x2c001028
#define MASK_VSHL_H_R_VV_M         0xfc00303f
#define MATCH_VSHL_H_R_VX_M        0x2c00102a
#define MASK_VSHL_H_R_VX_M         0xfe00303f
#define MATCH_VSHL_W_VV            0x24002008
#define MASK_VSHL_W_VV             0xfc00303f
#define MATCH_VSHL_W_VX            0x2400200a
#define MASK_VSHL_W_VX             0xfe00303f
#define MATCH_VSHL_W_R_VV          0x2c002008
#define MASK_VSHL_W_R_VV           0xfc00303f
#define MATCH_VSHL_W_R_VX          0x2c00200a
#define MASK_VSHL_W_R_VX           0xfe00303f
#define MATCH_VSHL_W_VV_M          0x24002028
#define MASK_VSHL_W_VV_M           0xfc00303f
#define MATCH_VSHL_W_VX_M          0x2400202a
#define MASK_VSHL_W_VX_M           0xfe00303f
#define MATCH_VSHL_W_R_VV_M        0x2c002028
#define MASK_VSHL_W_R_VV_M         0xfc00303f
#define MATCH_VSHL_W_R_VX_M        0x2c00202a
#define MASK_VSHL_W_R_VX_M         0xfe00303f
#define MATCH_VSRANS_B_VV          0x40000008
#define MASK_VSRANS_B_VV           0xfc00303f
#define MATCH_VSRANS_B_VX          0x4000000a
#define MASK_VSRANS_B_VX           0xfe00303f
#define MATCH_VSRANS_B_R_VV        0x48000008
#define MASK_VSRANS_B_R_VV         0xfc00303f
#define MATCH_VSRANS_B_R_VX        0x4800000a
#define MASK_VSRANS_B_R_VX         0xfe00303f
#define MATCH_VSRANS_B_VV_M        0x40000028
#define MASK_VSRANS_B_VV_M         0xfc00303f
#define MATCH_VSRANS_B_VX_M        0x4000002a
#define MASK_VSRANS_B_VX_M         0xfe00303f
#define MATCH_VSRANS_B_R_VV_M      0x48000028
#define MASK_VSRANS_B_R_VV_M       0xfc00303f
#define MATCH_VSRANS_B_R_VX_M      0x4800002a
#define MASK_VSRANS_B_R_VX_M       0xfe00303f
#define MATCH_VSRANS_H_VV          0x40001008
#define MASK_VSRANS_H_VV           0xfc00303f
#define MATCH_VSRANS_H_VX          0x4000100a
#define MASK_VSRANS_H_VX           0xfe00303f
#define MATCH_VSRANS_H_R_VV        0x48001008
#define MASK_VSRANS_H_R_VV         0xfc00303f
#define MATCH_VSRANS_H_R_VX        0x4800100a
#define MASK_VSRANS_H_R_VX         0xfe00303f
#define MATCH_VSRANS_H_VV_M        0x40001028
#define MASK_VSRANS_H_VV_M         0xfc00303f
#define MATCH_VSRANS_H_VX_M        0x4000102a
#define MASK_VSRANS_H_VX_M         0xfe00303f
#define MATCH_VSRANS_H_R_VV_M      0x48001028
#define MASK_VSRANS_H_R_VV_M       0xfc00303f
#define MATCH_VSRANS_H_R_VX_M      0x4800102a
#define MASK_VSRANS_H_R_VX_M       0xfe00303f
#define MATCH_VSRANSU_B_VV         0x44000008
#define MASK_VSRANSU_B_VV          0xfc00303f
#define MATCH_VSRANSU_B_VX         0x4400000a
#define MASK_VSRANSU_B_VX          0xfe00303f
#define MATCH_VSRANSU_B_R_VV       0x4c000008
#define MASK_VSRANSU_B_R_VV        0xfc00303f
#define MATCH_VSRANSU_B_R_VX       0x4c00000a
#define MASK_VSRANSU_B_R_VX        0xfe00303f
#define MATCH_VSRANSU_B_VV_M       0x44000028
#define MASK_VSRANSU_B_VV_M        0xfc00303f
#define MATCH_VSRANSU_B_VX_M       0x4400002a
#define MASK_VSRANSU_B_VX_M        0xfe00303f
#define MATCH_VSRANSU_B_R_VV_M     0x4c000028
#define MASK_VSRANSU_B_R_VV_M      0xfc00303f
#define MATCH_VSRANSU_B_R_VX_M     0x4c00002a
#define MASK_VSRANSU_B_R_VX_M      0xfe00303f
#define MATCH_VSRANSU_H_VV         0x44001008
#define MASK_VSRANSU_H_VV          0xfc00303f
#define MATCH_VSRANSU_H_VX         0x4400100a
#define MASK_VSRANSU_H_VX          0xfe00303f
#define MATCH_VSRANSU_H_R_VV       0x4c001008
#define MASK_VSRANSU_H_R_VV        0xfc00303f
#define MATCH_VSRANSU_H_R_VX       0x4c00100a
#define MASK_VSRANSU_H_R_VX        0xfe00303f
#define MATCH_VSRANSU_H_VV_M       0x44001028
#define MASK_VSRANSU_H_VV_M        0xfc00303f
#define MATCH_VSRANSU_H_VX_M       0x4400102a
#define MASK_VSRANSU_H_VX_M        0xfe00303f
#define MATCH_VSRANSU_H_R_VV_M     0x4c001028
#define MASK_VSRANSU_H_R_VV_M      0xfc00303f
#define MATCH_VSRANSU_H_R_VX_M     0x4c00102a
#define MASK_VSRANSU_H_R_VX_M      0xfe00303f
#define MATCH_VSRAQS_B_VV          0x60000008
#define MASK_VSRAQS_B_VV           0xfc00303f
#define MATCH_VSRAQS_B_VX          0x6000000a
#define MASK_VSRAQS_B_VX           0xfe00303f
#define MATCH_VSRAQS_B_R_VV        0x68000008
#define MASK_VSRAQS_B_R_VV         0xfc00303f
#define MATCH_VSRAQS_B_R_VX        0x6800000a
#define MASK_VSRAQS_B_R_VX         0xfe00303f
#define MATCH_VSRAQS_B_VV_M        0x60000028
#define MASK_VSRAQS_B_VV_M         0xfc00303f
#define MATCH_VSRAQS_B_VX_M        0x6000002a
#define MASK_VSRAQS_B_VX_M         0xfe00303f
#define MATCH_VSRAQS_B_R_VV_M      0x68000028
#define MASK_VSRAQS_B_R_VV_M       0xfc00303f
#define MATCH_VSRAQS_B_R_VX_M      0x6800002a
#define MASK_VSRAQS_B_R_VX_M       0xfe00303f
#define MATCH_VSRAQSU_B_VV         0x64000008
#define MASK_VSRAQSU_B_VV          0xfc00303f
#define MATCH_VSRAQSU_B_VX         0x6400000a
#define MASK_VSRAQSU_B_VX          0xfe00303f
#define MATCH_VSRAQSU_B_R_VV       0x6c000008
#define MASK_VSRAQSU_B_R_VV        0xfc00303f
#define MATCH_VSRAQSU_B_R_VX       0x6c00000a
#define MASK_VSRAQSU_B_R_VX        0xfe00303f
#define MATCH_VSRAQSU_B_VV_M       0x64000028
#define MASK_VSRAQSU_B_VV_M        0xfc00303f
#define MATCH_VSRAQSU_B_VX_M       0x6400002a
#define MASK_VSRAQSU_B_VX_M        0xfe00303f
#define MATCH_VSRAQSU_B_R_VV_M     0x6c000028
#define MASK_VSRAQSU_B_R_VV_M      0xfc00303f
#define MATCH_VSRAQSU_B_R_VX_M     0x6c00002a
#define MASK_VSRAQSU_B_R_VX_M      0xfe00303f

// 011 Mul/Div
#define MATCH_VMUL_B_VV            0x0000000c
#define MASK_VMUL_B_VV             0xfc00303f
#define MATCH_VMUL_B_VX            0x0000000e
#define MASK_VMUL_B_VX             0xfe00303f
#define MATCH_VMUL_B_VV_M          0x0000002c
#define MASK_VMUL_B_VV_M           0xfc00303f
#define MATCH_VMUL_B_VX_M          0x0000002e
#define MASK_VMUL_B_VX_M           0xfe00303f
#define MATCH_VMUL_H_VV            0x0000100c
#define MASK_VMUL_H_VV             0xfc00303f
#define MATCH_VMUL_H_VX            0x0000100e
#define MASK_VMUL_H_VX             0xfe00303f
#define MATCH_VMUL_H_VV_M          0x0000102c
#define MASK_VMUL_H_VV_M           0xfc00303f
#define MATCH_VMUL_H_VX_M          0x0000102e
#define MASK_VMUL_H_VX_M           0xfe00303f
#define MATCH_VMUL_W_VV            0x0000200c
#define MASK_VMUL_W_VV             0xfc00303f
#define MATCH_VMUL_W_VX            0x0000200e
#define MASK_VMUL_W_VX             0xfe00303f
#define MATCH_VMUL_W_VV_M          0x0000202c
#define MASK_VMUL_W_VV_M           0xfc00303f
#define MATCH_VMUL_W_VX_M          0x0000202e
#define MASK_VMUL_W_VX_M           0xfe00303f
#define MATCH_VMULS_B_VV           0x0800000c
#define MASK_VMULS_B_VV            0xfc00303f
#define MATCH_VMULS_B_VX           0x0800000e
#define MASK_VMULS_B_VX            0xfe00303f
#define MATCH_VMULS_B_U_VV         0x0c00000c
#define MASK_VMULS_B_U_VV          0xfc00303f
#define MATCH_VMULS_B_U_VX         0x0c00000e
#define MASK_VMULS_B_U_VX          0xfe00303f
#define MATCH_VMULS_B_VV_M         0x0800002c
#define MASK_VMULS_B_VV_M          0xfc00303f
#define MATCH_VMULS_B_VX_M         0x0800002e
#define MASK_VMULS_B_VX_M          0xfe00303f
#define MATCH_VMULS_B_U_VV_M       0x0c00002c
#define MASK_VMULS_B_U_VV_M        0xfc00303f
#define MATCH_VMULS_B_U_VX_M       0x0c00002e
#define MASK_VMULS_B_U_VX_M        0xfe00303f
#define MATCH_VMULS_H_VV           0x0800100c
#define MASK_VMULS_H_VV            0xfc00303f
#define MATCH_VMULS_H_VX           0x0800100e
#define MASK_VMULS_H_VX            0xfe00303f
#define MATCH_VMULS_H_U_VV         0x0c00100c
#define MASK_VMULS_H_U_VV          0xfc00303f
#define MATCH_VMULS_H_U_VX         0x0c00100e
#define MASK_VMULS_H_U_VX          0xfe00303f
#define MATCH_VMULS_H_VV_M         0x0800102c
#define MASK_VMULS_H_VV_M          0xfc00303f
#define MATCH_VMULS_H_VX_M         0x0800102e
#define MASK_VMULS_H_VX_M          0xfe00303f
#define MATCH_VMULS_H_U_VV_M       0x0c00102c
#define MASK_VMULS_H_U_VV_M        0xfc00303f
#define MATCH_VMULS_H_U_VX_M       0x0c00102e
#define MASK_VMULS_H_U_VX_M        0xfe00303f
#define MATCH_VMULS_W_VV           0x0800200c
#define MASK_VMULS_W_VV            0xfc00303f
#define MATCH_VMULS_W_VX           0x0800200e
#define MASK_VMULS_W_VX            0xfe00303f
#define MATCH_VMULS_W_U_VV         0x0c00200c
#define MASK_VMULS_W_U_VV          0xfc00303f
#define MATCH_VMULS_W_U_VX         0x0c00200e
#define MASK_VMULS_W_U_VX          0xfe00303f
#define MATCH_VMULS_W_VV_M         0x0800202c
#define MASK_VMULS_W_VV_M          0xfc00303f
#define MATCH_VMULS_W_VX_M         0x0800202e
#define MASK_VMULS_W_VX_M          0xfe00303f
#define MATCH_VMULS_W_U_VV_M       0x0c00202c
#define MASK_VMULS_W_U_VV_M        0xfc00303f
#define MATCH_VMULS_W_U_VX_M       0x0c00202e
#define MASK_VMULS_W_U_VX_M        0xfe00303f
#define MATCH_VMULW_B_VV           0x1000000c
#define MASK_VMULW_B_VV            0xfc00303f
#define MATCH_VMULW_B_VX           0x1000000e
#define MASK_VMULW_B_VX            0xfe00303f
#define MATCH_VMULW_B_U_VV         0x1400000c
#define MASK_VMULW_B_U_VV          0xfc00303f
#define MATCH_VMULW_B_U_VX         0x1400000e
#define MASK_VMULW_B_U_VX          0xfe00303f
#define MATCH_VMULW_B_VV_M         0x1000002c
#define MASK_VMULW_B_VV_M          0xfc00303f
#define MATCH_VMULW_B_VX_M         0x1000002e
#define MASK_VMULW_B_VX_M          0xfe00303f
#define MATCH_VMULW_B_U_VV_M       0x1400002c
#define MASK_VMULW_B_U_VV_M        0xfc00303f
#define MATCH_VMULW_B_U_VX_M       0x1400002e
#define MASK_VMULW_B_U_VX_M        0xfe00303f
#define MATCH_VMULW_H_VV           0x1000100c
#define MASK_VMULW_H_VV            0xfc00303f
#define MATCH_VMULW_H_VX           0x1000100e
#define MASK_VMULW_H_VX            0xfe00303f
#define MATCH_VMULW_H_U_VV         0x1400100c
#define MASK_VMULW_H_U_VV          0xfc00303f
#define MATCH_VMULW_H_U_VX         0x1400100e
#define MASK_VMULW_H_U_VX          0xfe00303f
#define MATCH_VMULW_H_VV_M         0x1000102c
#define MASK_VMULW_H_VV_M          0xfc00303f
#define MATCH_VMULW_H_VX_M         0x1000102e
#define MASK_VMULW_H_VX_M          0xfe00303f
#define MATCH_VMULW_H_U_VV_M       0x1400102c
#define MASK_VMULW_H_U_VV_M        0xfc00303f
#define MATCH_VMULW_H_U_VX_M       0x1400102e
#define MASK_VMULW_H_U_VX_M        0xfe00303f
#define MATCH_VMULW_W_VV           0x1000200c
#define MASK_VMULW_W_VV            0xfc00303f
#define MATCH_VMULW_W_VX           0x1000200e
#define MASK_VMULW_W_VX            0xfe00303f
#define MATCH_VMULW_W_U_VV         0x1400200c
#define MASK_VMULW_W_U_VV          0xfc00303f
#define MATCH_VMULW_W_U_VX         0x1400200e
#define MASK_VMULW_W_U_VX          0xfe00303f
#define MATCH_VMULW_W_VV_M         0x1000202c
#define MASK_VMULW_W_VV_M          0xfc00303f
#define MATCH_VMULW_W_VX_M         0x1000202e
#define MASK_VMULW_W_VX_M          0xfe00303f
#define MATCH_VMULW_W_U_VV_M       0x1400202c
#define MASK_VMULW_W_U_VV_M        0xfc00303f
#define MATCH_VMULW_W_U_VX_M       0x1400202e
#define MASK_VMULW_W_U_VX_M        0xfe00303f
#define MATCH_VMULH_B_VV           0x2000000c
#define MASK_VMULH_B_VV            0xfc00303f
#define MATCH_VMULH_B_VX           0x2000000e
#define MASK_VMULH_B_VX            0xfe00303f
#define MATCH_VMULH_B_R_VV         0x2800000c
#define MASK_VMULH_B_R_VV          0xfc00303f
#define MATCH_VMULH_B_R_VX         0x2800000e
#define MASK_VMULH_B_R_VX          0xfe00303f
#define MATCH_VMULH_B_VV_M         0x2000002c
#define MASK_VMULH_B_VV_M          0xfc00303f
#define MATCH_VMULH_B_VX_M         0x2000002e
#define MASK_VMULH_B_VX_M          0xfe00303f
#define MATCH_VMULH_B_R_VV_M       0x2800002c
#define MASK_VMULH_B_R_VV_M        0xfc00303f
#define MATCH_VMULH_B_R_VX_M       0x2800002e
#define MASK_VMULH_B_R_VX_M        0xfe00303f
#define MATCH_VMULH_H_VV           0x2000100c
#define MASK_VMULH_H_VV            0xfc00303f
#define MATCH_VMULH_H_VX           0x2000100e
#define MASK_VMULH_H_VX            0xfe00303f
#define MATCH_VMULH_H_R_VV         0x2800100c
#define MASK_VMULH_H_R_VV          0xfc00303f
#define MATCH_VMULH_H_R_VX         0x2800100e
#define MASK_VMULH_H_R_VX          0xfe00303f
#define MATCH_VMULH_H_VV_M         0x2000102c
#define MASK_VMULH_H_VV_M          0xfc00303f
#define MATCH_VMULH_H_VX_M         0x2000102e
#define MASK_VMULH_H_VX_M          0xfe00303f
#define MATCH_VMULH_H_R_VV_M       0x2800102c
#define MASK_VMULH_H_R_VV_M        0xfc00303f
#define MATCH_VMULH_H_R_VX_M       0x2800102e
#define MASK_VMULH_H_R_VX_M        0xfe00303f
#define MATCH_VMULH_W_VV           0x2000200c
#define MASK_VMULH_W_VV            0xfc00303f
#define MATCH_VMULH_W_VX           0x2000200e
#define MASK_VMULH_W_VX            0xfe00303f
#define MATCH_VMULH_W_R_VV         0x2800200c
#define MASK_VMULH_W_R_VV          0xfc00303f
#define MATCH_VMULH_W_R_VX         0x2800200e
#define MASK_VMULH_W_R_VX          0xfe00303f
#define MATCH_VMULH_W_VV_M         0x2000202c
#define MASK_VMULH_W_VV_M          0xfc00303f
#define MATCH_VMULH_W_VX_M         0x2000202e
#define MASK_VMULH_W_VX_M          0xfe00303f
#define MATCH_VMULH_W_R_VV_M       0x2800202c
#define MASK_VMULH_W_R_VV_M        0xfc00303f
#define MATCH_VMULH_W_R_VX_M       0x2800202e
#define MASK_VMULH_W_R_VX_M        0xfe00303f
#define MATCH_VMULHU_B_VV          0x2400000c
#define MASK_VMULHU_B_VV           0xfc00303f
#define MATCH_VMULHU_B_VX          0x2400000e
#define MASK_VMULHU_B_VX           0xfe00303f
#define MATCH_VMULHU_B_R_VV        0x2c00000c
#define MASK_VMULHU_B_R_VV         0xfc00303f
#define MATCH_VMULHU_B_R_VX        0x2c00000e
#define MASK_VMULHU_B_R_VX         0xfe00303f
#define MATCH_VMULHU_B_VV_M        0x2400002c
#define MASK_VMULHU_B_VV_M         0xfc00303f
#define MATCH_VMULHU_B_VX_M        0x2400002e
#define MASK_VMULHU_B_VX_M         0xfe00303f
#define MATCH_VMULHU_B_R_VV_M      0x2c00002c
#define MASK_VMULHU_B_R_VV_M       0xfc00303f
#define MATCH_VMULHU_B_R_VX_M      0x2c00002e
#define MASK_VMULHU_B_R_VX_M       0xfe00303f
#define MATCH_VMULHU_H_VV          0x2400100c
#define MASK_VMULHU_H_VV           0xfc00303f
#define MATCH_VMULHU_H_VX          0x2400100e
#define MASK_VMULHU_H_VX           0xfe00303f
#define MATCH_VMULHU_H_R_VV        0x2c00100c
#define MASK_VMULHU_H_R_VV         0xfc00303f
#define MATCH_VMULHU_H_R_VX        0x2c00100e
#define MASK_VMULHU_H_R_VX         0xfe00303f
#define MATCH_VMULHU_H_VV_M        0x2400102c
#define MASK_VMULHU_H_VV_M         0xfc00303f
#define MATCH_VMULHU_H_VX_M        0x2400102e
#define MASK_VMULHU_H_VX_M         0xfe00303f
#define MATCH_VMULHU_H_R_VV_M      0x2c00102c
#define MASK_VMULHU_H_R_VV_M       0xfc00303f
#define MATCH_VMULHU_H_R_VX_M      0x2c00102e
#define MASK_VMULHU_H_R_VX_M       0xfe00303f
#define MATCH_VMULHU_W_VV          0x2400200c
#define MASK_VMULHU_W_VV           0xfc00303f
#define MATCH_VMULHU_W_VX          0x2400200e
#define MASK_VMULHU_W_VX           0xfe00303f
#define MATCH_VMULHU_W_R_VV        0x2c00200c
#define MASK_VMULHU_W_R_VV         0xfc00303f
#define MATCH_VMULHU_W_R_VX        0x2c00200e
#define MASK_VMULHU_W_R_VX         0xfe00303f
#define MATCH_VMULHU_W_VV_M        0x2400202c
#define MASK_VMULHU_W_VV_M         0xfc00303f
#define MATCH_VMULHU_W_VX_M        0x2400202e
#define MASK_VMULHU_W_VX_M         0xfe00303f
#define MATCH_VMULHU_W_R_VV_M      0x2c00202c
#define MASK_VMULHU_W_R_VV_M       0xfc00303f
#define MATCH_VMULHU_W_R_VX_M      0x2c00202e
#define MASK_VMULHU_W_R_VX_M       0xfe00303f
#define MATCH_VDMULH_B_VV          0x4000000c
#define MASK_VDMULH_B_VV           0xfc00303f
#define MATCH_VDMULH_B_VX          0x4000000e
#define MASK_VDMULH_B_VX           0xfe00303f
#define MATCH_VDMULH_B_R_VV        0x4800000c
#define MASK_VDMULH_B_R_VV         0xfc00303f
#define MATCH_VDMULH_B_R_VX        0x4800000e
#define MASK_VDMULH_B_R_VX         0xfe00303f
#define MATCH_VDMULH_B_RN_VV       0x4c00000c
#define MASK_VDMULH_B_RN_VV        0xfc00303f
#define MATCH_VDMULH_B_RN_VX       0x4c00000e
#define MASK_VDMULH_B_RN_VX        0xfe00303f
#define MATCH_VDMULH_B_VV_M        0x4000002c
#define MASK_VDMULH_B_VV_M         0xfc00303f
#define MATCH_VDMULH_B_VX_M        0x4000002e
#define MASK_VDMULH_B_VX_M         0xfe00303f
#define MATCH_VDMULH_B_R_VV_M      0x4800002c
#define MASK_VDMULH_B_R_VV_M       0xfc00303f
#define MATCH_VDMULH_B_R_VX_M      0x4800002e
#define MASK_VDMULH_B_R_VX_M       0xfe00303f
#define MATCH_VDMULH_B_RN_VV_M     0x4c00002c
#define MASK_VDMULH_B_RN_VV_M      0xfc00303f
#define MATCH_VDMULH_B_RN_VX_M     0x4c00002e
#define MASK_VDMULH_B_RN_VX_M      0xfe00303f
#define MATCH_VDMULH_H_VV          0x4000100c
#define MASK_VDMULH_H_VV           0xfc00303f
#define MATCH_VDMULH_H_VX          0x4000100e
#define MASK_VDMULH_H_VX           0xfe00303f
#define MATCH_VDMULH_H_R_VV        0x4800100c
#define MASK_VDMULH_H_R_VV         0xfc00303f
#define MATCH_VDMULH_H_R_VX        0x4800100e
#define MASK_VDMULH_H_R_VX         0xfe00303f
#define MATCH_VDMULH_H_RN_VV       0x4c00100c
#define MASK_VDMULH_H_RN_VV        0xfc00303f
#define MATCH_VDMULH_H_RN_VX       0x4c00100e
#define MASK_VDMULH_H_RN_VX        0xfe00303f
#define MATCH_VDMULH_H_VV_M        0x4000102c
#define MASK_VDMULH_H_VV_M         0xfc00303f
#define MATCH_VDMULH_H_VX_M        0x4000102e
#define MASK_VDMULH_H_VX_M         0xfe00303f
#define MATCH_VDMULH_H_R_VV_M      0x4800102c
#define MASK_VDMULH_H_R_VV_M       0xfc00303f
#define MATCH_VDMULH_H_R_VX_M      0x4800102e
#define MASK_VDMULH_H_R_VX_M       0xfe00303f
#define MATCH_VDMULH_H_RN_VV_M     0x4c00102c
#define MASK_VDMULH_H_RN_VV_M      0xfc00303f
#define MATCH_VDMULH_H_RN_VX_M     0x4c00102e
#define MASK_VDMULH_H_RN_VX_M      0xfe00303f
#define MATCH_VDMULH_W_VV          0x4000200c
#define MASK_VDMULH_W_VV           0xfc00303f
#define MATCH_VDMULH_W_VX          0x4000200e
#define MASK_VDMULH_W_VX           0xfe00303f
#define MATCH_VDMULH_W_R_VV        0x4800200c
#define MASK_VDMULH_W_R_VV         0xfc00303f
#define MATCH_VDMULH_W_R_VX        0x4800200e
#define MASK_VDMULH_W_R_VX         0xfe00303f
#define MATCH_VDMULH_W_RN_VV       0x4c00200c
#define MASK_VDMULH_W_RN_VV        0xfc00303f
#define MATCH_VDMULH_W_RN_VX       0x4c00200e
#define MASK_VDMULH_W_RN_VX        0xfe00303f
#define MATCH_VDMULH_W_VV_M        0x4000202c
#define MASK_VDMULH_W_VV_M         0xfc00303f
#define MATCH_VDMULH_W_VX_M        0x4000202e
#define MASK_VDMULH_W_VX_M         0xfe00303f
#define MATCH_VDMULH_W_R_VV_M      0x4800202c
#define MASK_VDMULH_W_R_VV_M       0xfc00303f
#define MATCH_VDMULH_W_R_VX_M      0x4800202e
#define MASK_VDMULH_W_R_VX_M       0xfe00303f
#define MATCH_VDMULH_W_RN_VV_M     0x4c00202c
#define MASK_VDMULH_W_RN_VV_M      0xfc00303f
#define MATCH_VDMULH_W_RN_VX_M     0x4c00202e
#define MASK_VDMULH_W_RN_VX_M      0xfe00303f
#define MATCH_VMACC_B_VV           0x5000000c
#define MASK_VMACC_B_VV            0xfc00303f
#define MATCH_VMACC_B_VX           0x5000000e
#define MASK_VMACC_B_VX            0xfe00303f
#define MATCH_VMACC_B_VV_M         0x5000002c
#define MASK_VMACC_B_VV_M          0xfc00303f
#define MATCH_VMACC_B_VX_M         0x5000002e
#define MASK_VMACC_B_VX_M          0xfe00303f
#define MATCH_VMACC_H_VV           0x5000100c
#define MASK_VMACC_H_VV            0xfc00303f
#define MATCH_VMACC_H_VX           0x5000100e
#define MASK_VMACC_H_VX            0xfe00303f
#define MATCH_VMACC_H_VV_M         0x5000102c
#define MASK_VMACC_H_VV_M          0xfc00303f
#define MATCH_VMACC_H_VX_M         0x5000102e
#define MASK_VMACC_H_VX_M          0xfe00303f
#define MATCH_VMACC_W_VV           0x5000200c
#define MASK_VMACC_W_VV            0xfc00303f
#define MATCH_VMACC_W_VX           0x5000200e
#define MASK_VMACC_W_VX            0xfe00303f
#define MATCH_VMACC_W_VV_M         0x5000202c
#define MASK_VMACC_W_VV_M          0xfc00303f
#define MATCH_VMACC_W_VX_M         0x5000202e
#define MASK_VMACC_W_VX_M          0xfe00303f
#define MATCH_VMADD_B_VV           0x5400000c
#define MASK_VMADD_B_VV            0xfc00303f
#define MATCH_VMADD_B_VX           0x5400000e
#define MASK_VMADD_B_VX            0xfe00303f
#define MATCH_VMADD_B_VV_M         0x5400002c
#define MASK_VMADD_B_VV_M          0xfc00303f
#define MATCH_VMADD_B_VX_M         0x5400002e
#define MASK_VMADD_B_VX_M          0xfe00303f
#define MATCH_VMADD_H_VV           0x5400100c
#define MASK_VMADD_H_VV            0xfc00303f
#define MATCH_VMADD_H_VX           0x5400100e
#define MASK_VMADD_H_VX            0xfe00303f
#define MATCH_VMADD_H_VV_M         0x5400102c
#define MASK_VMADD_H_VV_M          0xfc00303f
#define MATCH_VMADD_H_VX_M         0x5400102e
#define MASK_VMADD_H_VX_M          0xfe00303f
#define MATCH_VMADD_W_VV           0x5400200c
#define MASK_VMADD_W_VV            0xfc00303f
#define MATCH_VMADD_W_VX           0x5400200e
#define MASK_VMADD_W_VX            0xfe00303f
#define MATCH_VMADD_W_VV_M         0x5400202c
#define MASK_VMADD_W_VV_M          0xfc00303f
#define MATCH_VMADD_W_VX_M         0x5400202e
#define MASK_VMADD_W_VX_M          0xfe00303f

// 110 Shuffle
#define MATCH_VSLIDEN_B_1_VV       0x00000018
#define MASK_VSLIDEN_B_1_VV        0xfc00303f
#define MATCH_VSLIDEN_B_1_VX       0x0000001a
#define MASK_VSLIDEN_B_1_VX        0xfe00303f
#define MATCH_VSLIDEN_B_2_VV       0x04000018
#define MASK_VSLIDEN_B_2_VV        0xfc00303f
#define MATCH_VSLIDEN_B_2_VX       0x0400001a
#define MASK_VSLIDEN_B_2_VX        0xfe00303f
#define MATCH_VSLIDEN_B_3_VV       0x08000018
#define MASK_VSLIDEN_B_3_VV        0xfc00303f
#define MATCH_VSLIDEN_B_3_VX       0x0800001a
#define MASK_VSLIDEN_B_3_VX        0xfe00303f
#define MATCH_VSLIDEN_B_4_VV       0x0c000018
#define MASK_VSLIDEN_B_4_VV        0xfc00303f
#define MATCH_VSLIDEN_B_4_VX       0x0c00001a
#define MASK_VSLIDEN_B_4_VX        0xfe00303f
#define MATCH_VSLIDEN_H_1_VV       0x00001018
#define MASK_VSLIDEN_H_1_VV        0xfc00303f
#define MATCH_VSLIDEN_H_1_VX       0x0000101a
#define MASK_VSLIDEN_H_1_VX        0xfe00303f
#define MATCH_VSLIDEN_H_2_VV       0x04001018
#define MASK_VSLIDEN_H_2_VV        0xfc00303f
#define MATCH_VSLIDEN_H_2_VX       0x0400101a
#define MASK_VSLIDEN_H_2_VX        0xfe00303f
#define MATCH_VSLIDEN_H_3_VV       0x08001018
#define MASK_VSLIDEN_H_3_VV        0xfc00303f
#define MATCH_VSLIDEN_H_3_VX       0x0800101a
#define MASK_VSLIDEN_H_3_VX        0xfe00303f
#define MATCH_VSLIDEN_H_4_VV       0x0c001018
#define MASK_VSLIDEN_H_4_VV        0xfc00303f
#define MATCH_VSLIDEN_H_4_VX       0x0c00101a
#define MASK_VSLIDEN_H_4_VX        0xfe00303f
#define MATCH_VSLIDEN_W_1_VV       0x00002018
#define MASK_VSLIDEN_W_1_VV        0xfc00303f
#define MATCH_VSLIDEN_W_1_VX       0x0000201a
#define MASK_VSLIDEN_W_1_VX        0xfe00303f
#define MATCH_VSLIDEN_W_2_VV       0x04002018
#define MASK_VSLIDEN_W_2_VV        0xfc00303f
#define MATCH_VSLIDEN_W_2_VX       0x0400201a
#define MASK_VSLIDEN_W_2_VX        0xfe00303f
#define MATCH_VSLIDEN_W_3_VV       0x08002018
#define MASK_VSLIDEN_W_3_VV        0xfc00303f
#define MATCH_VSLIDEN_W_3_VX       0x0800201a
#define MASK_VSLIDEN_W_3_VX        0xfe00303f
#define MATCH_VSLIDEN_W_4_VV       0x0c002018
#define MASK_VSLIDEN_W_4_VV        0xfc00303f
#define MATCH_VSLIDEN_W_4_VX       0x0c00201a
#define MASK_VSLIDEN_W_4_VX        0xfe00303f
#define MATCH_VSLIDEVN_B_1_VV_M    0x00000038
#define MASK_VSLIDEVN_B_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_B_1_VX_M    0x0000003a
#define MASK_VSLIDEVN_B_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_B_2_VV_M    0x04000038
#define MASK_VSLIDEVN_B_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_B_2_VX_M    0x0400003a
#define MASK_VSLIDEVN_B_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_B_3_VV_M    0x08000038
#define MASK_VSLIDEVN_B_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_B_3_VX_M    0x0800003a
#define MASK_VSLIDEVN_B_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_B_4_VV_M    0x0c000038
#define MASK_VSLIDEVN_B_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_B_4_VX_M    0x0c00003a
#define MASK_VSLIDEVN_B_4_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_H_1_VV_M    0x00001038
#define MASK_VSLIDEVN_H_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_H_1_VX_M    0x0000103a
#define MASK_VSLIDEVN_H_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_H_2_VV_M    0x04001038
#define MASK_VSLIDEVN_H_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_H_2_VX_M    0x0400103a
#define MASK_VSLIDEVN_H_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_H_3_VV_M    0x08001038
#define MASK_VSLIDEVN_H_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_H_3_VX_M    0x0800103a
#define MASK_VSLIDEVN_H_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_H_4_VV_M    0x0c001038
#define MASK_VSLIDEVN_H_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_H_4_VX_M    0x0c00103a
#define MASK_VSLIDEVN_H_4_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_W_1_VV_M    0x00002038
#define MASK_VSLIDEVN_W_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_W_1_VX_M    0x0000203a
#define MASK_VSLIDEVN_W_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_W_2_VV_M    0x04002038
#define MASK_VSLIDEVN_W_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_W_2_VX_M    0x0400203a
#define MASK_VSLIDEVN_W_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_W_3_VV_M    0x08002038
#define MASK_VSLIDEVN_W_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_W_3_VX_M    0x0800203a
#define MASK_VSLIDEVN_W_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVN_W_4_VV_M    0x0c002038
#define MASK_VSLIDEVN_W_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVN_W_4_VX_M    0x0c00203a
#define MASK_VSLIDEVN_W_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_B_1_VV_M    0x10000038
#define MASK_VSLIDEHN_B_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_B_1_VX_M    0x1000003a
#define MASK_VSLIDEHN_B_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_B_2_VV_M    0x14000038
#define MASK_VSLIDEHN_B_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_B_2_VX_M    0x1400003a
#define MASK_VSLIDEHN_B_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_B_3_VV_M    0x18000038
#define MASK_VSLIDEHN_B_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_B_3_VX_M    0x1800003a
#define MASK_VSLIDEHN_B_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_B_4_VV_M    0x1c000038
#define MASK_VSLIDEHN_B_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_B_4_VX_M    0x1c00003a
#define MASK_VSLIDEHN_B_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_H_1_VV_M    0x10001038
#define MASK_VSLIDEHN_H_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_H_1_VX_M    0x1000103a
#define MASK_VSLIDEHN_H_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_H_2_VV_M    0x14001038
#define MASK_VSLIDEHN_H_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_H_2_VX_M    0x1400103a
#define MASK_VSLIDEHN_H_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_H_3_VV_M    0x18001038
#define MASK_VSLIDEHN_H_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_H_3_VX_M    0x1800103a
#define MASK_VSLIDEHN_H_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_H_4_VV_M    0x1c001038
#define MASK_VSLIDEHN_H_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_H_4_VX_M    0x1c00103a
#define MASK_VSLIDEHN_H_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_W_1_VV_M    0x10002038
#define MASK_VSLIDEHN_W_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_W_1_VX_M    0x1000203a
#define MASK_VSLIDEHN_W_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_W_2_VV_M    0x14002038
#define MASK_VSLIDEHN_W_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_W_2_VX_M    0x1400203a
#define MASK_VSLIDEHN_W_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_W_3_VV_M    0x18002038
#define MASK_VSLIDEHN_W_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_W_3_VX_M    0x1800203a
#define MASK_VSLIDEHN_W_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHN_W_4_VV_M    0x1c002038
#define MASK_VSLIDEHN_W_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHN_W_4_VX_M    0x1c00203a
#define MASK_VSLIDEHN_W_4_VX_M     0xfe00303f
#define MATCH_VSLIDEP_B_1_VV       0x20000018
#define MASK_VSLIDEP_B_1_VV        0xfc00303f
#define MATCH_VSLIDEP_B_1_VX       0x2000001a
#define MASK_VSLIDEP_B_1_VX        0xfe00303f
#define MATCH_VSLIDEP_B_2_VV       0x24000018
#define MASK_VSLIDEP_B_2_VV        0xfc00303f
#define MATCH_VSLIDEP_B_2_VX       0x2400001a
#define MASK_VSLIDEP_B_2_VX        0xfe00303f
#define MATCH_VSLIDEP_B_3_VV       0x28000018
#define MASK_VSLIDEP_B_3_VV        0xfc00303f
#define MATCH_VSLIDEP_B_3_VX       0x2800001a
#define MASK_VSLIDEP_B_3_VX        0xfe00303f
#define MATCH_VSLIDEP_B_4_VV       0x2c000018
#define MASK_VSLIDEP_B_4_VV        0xfc00303f
#define MATCH_VSLIDEP_B_4_VX       0x2c00001a
#define MASK_VSLIDEP_B_4_VX        0xfe00303f
#define MATCH_VSLIDEP_H_1_VV       0x20001018
#define MASK_VSLIDEP_H_1_VV        0xfc00303f
#define MATCH_VSLIDEP_H_1_VX       0x2000101a
#define MASK_VSLIDEP_H_1_VX        0xfe00303f
#define MATCH_VSLIDEP_H_2_VV       0x24001018
#define MASK_VSLIDEP_H_2_VV        0xfc00303f
#define MATCH_VSLIDEP_H_2_VX       0x2400101a
#define MASK_VSLIDEP_H_2_VX        0xfe00303f
#define MATCH_VSLIDEP_H_3_VV       0x28001018
#define MASK_VSLIDEP_H_3_VV        0xfc00303f
#define MATCH_VSLIDEP_H_3_VX       0x2800101a
#define MASK_VSLIDEP_H_3_VX        0xfe00303f
#define MATCH_VSLIDEP_H_4_VV       0x2c001018
#define MASK_VSLIDEP_H_4_VV        0xfc00303f
#define MATCH_VSLIDEP_H_4_VX       0x2c00101a
#define MASK_VSLIDEP_H_4_VX        0xfe00303f
#define MATCH_VSLIDEP_W_1_VV       0x20002018
#define MASK_VSLIDEP_W_1_VV        0xfc00303f
#define MATCH_VSLIDEP_W_1_VX       0x2000201a
#define MASK_VSLIDEP_W_1_VX        0xfe00303f
#define MATCH_VSLIDEP_W_2_VV       0x24002018
#define MASK_VSLIDEP_W_2_VV        0xfc00303f
#define MATCH_VSLIDEP_W_2_VX       0x2400201a
#define MASK_VSLIDEP_W_2_VX        0xfe00303f
#define MATCH_VSLIDEP_W_3_VV       0x28002018
#define MASK_VSLIDEP_W_3_VV        0xfc00303f
#define MATCH_VSLIDEP_W_3_VX       0x2800201a
#define MASK_VSLIDEP_W_3_VX        0xfe00303f
#define MATCH_VSLIDEP_W_4_VV       0x2c002018
#define MASK_VSLIDEP_W_4_VV        0xfc00303f
#define MATCH_VSLIDEP_W_4_VX       0x2c00201a
#define MASK_VSLIDEP_W_4_VX        0xfe00303f
#define MATCH_VSLIDEVP_B_1_VV_M    0x20000038
#define MASK_VSLIDEVP_B_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_B_1_VX_M    0x2000003a
#define MASK_VSLIDEVP_B_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_B_2_VV_M    0x24000038
#define MASK_VSLIDEVP_B_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_B_2_VX_M    0x2400003a
#define MASK_VSLIDEVP_B_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_B_3_VV_M    0x28000038
#define MASK_VSLIDEVP_B_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_B_3_VX_M    0x2800003a
#define MASK_VSLIDEVP_B_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_B_4_VV_M    0x2c000038
#define MASK_VSLIDEVP_B_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_B_4_VX_M    0x2c00003a
#define MASK_VSLIDEVP_B_4_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_H_1_VV_M    0x20001038
#define MASK_VSLIDEVP_H_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_H_1_VX_M    0x2000103a
#define MASK_VSLIDEVP_H_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_H_2_VV_M    0x24001038
#define MASK_VSLIDEVP_H_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_H_2_VX_M    0x2400103a
#define MASK_VSLIDEVP_H_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_H_3_VV_M    0x28001038
#define MASK_VSLIDEVP_H_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_H_3_VX_M    0x2800103a
#define MASK_VSLIDEVP_H_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_H_4_VV_M    0x2c001038
#define MASK_VSLIDEVP_H_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_H_4_VX_M    0x2c00103a
#define MASK_VSLIDEVP_H_4_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_W_1_VV_M    0x20002038
#define MASK_VSLIDEVP_W_1_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_W_1_VX_M    0x2000203a
#define MASK_VSLIDEVP_W_1_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_W_2_VV_M    0x24002038
#define MASK_VSLIDEVP_W_2_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_W_2_VX_M    0x2400203a
#define MASK_VSLIDEVP_W_2_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_W_3_VV_M    0x28002038
#define MASK_VSLIDEVP_W_3_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_W_3_VX_M    0x2800203a
#define MASK_VSLIDEVP_W_3_VX_M     0xfe00303f
#define MATCH_VSLIDEVP_W_4_VV_M    0x2c002038
#define MASK_VSLIDEVP_W_4_VV_M     0xfc00303f
#define MATCH_VSLIDEVP_W_4_VX_M    0x2c00203a
#define MASK_VSLIDEVP_W_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_B_1_VV_M    0x30000038
#define MASK_VSLIDEHP_B_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_B_1_VX_M    0x3000003a
#define MASK_VSLIDEHP_B_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_B_2_VV_M    0x34000038
#define MASK_VSLIDEHP_B_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_B_2_VX_M    0x3400003a
#define MASK_VSLIDEHP_B_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_B_3_VV_M    0x38000038
#define MASK_VSLIDEHP_B_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_B_3_VX_M    0x3800003a
#define MASK_VSLIDEHP_B_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_B_4_VV_M    0x3c000038
#define MASK_VSLIDEHP_B_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_B_4_VX_M    0x3c00003a
#define MASK_VSLIDEHP_B_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_H_1_VV_M    0x30001038
#define MASK_VSLIDEHP_H_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_H_1_VX_M    0x3000103a
#define MASK_VSLIDEHP_H_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_H_2_VV_M    0x34001038
#define MASK_VSLIDEHP_H_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_H_2_VX_M    0x3400103a
#define MASK_VSLIDEHP_H_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_H_3_VV_M    0x38001038
#define MASK_VSLIDEHP_H_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_H_3_VX_M    0x3800103a
#define MASK_VSLIDEHP_H_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_H_4_VV_M    0x3c001038
#define MASK_VSLIDEHP_H_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_H_4_VX_M    0x3c00103a
#define MASK_VSLIDEHP_H_4_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_W_1_VV_M    0x30002038
#define MASK_VSLIDEHP_W_1_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_W_1_VX_M    0x3000203a
#define MASK_VSLIDEHP_W_1_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_W_2_VV_M    0x34002038
#define MASK_VSLIDEHP_W_2_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_W_2_VX_M    0x3400203a
#define MASK_VSLIDEHP_W_2_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_W_3_VV_M    0x38002038
#define MASK_VSLIDEHP_W_3_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_W_3_VX_M    0x3800203a
#define MASK_VSLIDEHP_W_3_VX_M     0xfe00303f
#define MATCH_VSLIDEHP_W_4_VV_M    0x3c002038
#define MASK_VSLIDEHP_W_4_VV_M     0xfc00303f
#define MATCH_VSLIDEHP_W_4_VX_M    0x3c00203a
#define MASK_VSLIDEHP_W_4_VX_M     0xfe00303f
#define MATCH_VSEL_B_VV            0x40000018
#define MASK_VSEL_B_VV             0xfc00303f
#define MATCH_VSEL_B_VX            0x4000001a
#define MASK_VSEL_B_VX             0xfe00303f
#define MATCH_VSEL_B_VV_M          0x40000038
#define MASK_VSEL_B_VV_M           0xfc00303f
#define MATCH_VSEL_B_VX_M          0x4000003a
#define MASK_VSEL_B_VX_M           0xfe00303f
#define MATCH_VSEL_H_VV            0x40001018
#define MASK_VSEL_H_VV             0xfc00303f
#define MATCH_VSEL_H_VX            0x4000101a
#define MASK_VSEL_H_VX             0xfe00303f
#define MATCH_VSEL_H_VV_M          0x40001038
#define MASK_VSEL_H_VV_M           0xfc00303f
#define MATCH_VSEL_H_VX_M          0x4000103a
#define MASK_VSEL_H_VX_M           0xfe00303f
#define MATCH_VSEL_W_VV            0x40002018
#define MASK_VSEL_W_VV             0xfc00303f
#define MATCH_VSEL_W_VX            0x4000201a
#define MASK_VSEL_W_VX             0xfe00303f
#define MATCH_VSEL_W_VV_M          0x40002038
#define MASK_VSEL_W_VV_M           0xfc00303f
#define MATCH_VSEL_W_VX_M          0x4000203a
#define MASK_VSEL_W_VX_M           0xfe00303f
#define MATCH_VEVN_B_VV            0x60000018
#define MASK_VEVN_B_VV             0xfc00303f
#define MATCH_VEVN_B_VX            0x6000001a
#define MASK_VEVN_B_VX             0xfe00303f
#define MATCH_VEVN_B_VV_M          0x60000038
#define MASK_VEVN_B_VV_M           0xfc00303f
#define MATCH_VEVN_B_VX_M          0x6000003a
#define MASK_VEVN_B_VX_M           0xfe00303f
#define MATCH_VEVN_H_VV            0x60001018
#define MASK_VEVN_H_VV             0xfc00303f
#define MATCH_VEVN_H_VX            0x6000101a
#define MASK_VEVN_H_VX             0xfe00303f
#define MATCH_VEVN_H_VV_M          0x60001038
#define MASK_VEVN_H_VV_M           0xfc00303f
#define MATCH_VEVN_H_VX_M          0x6000103a
#define MASK_VEVN_H_VX_M           0xfe00303f
#define MATCH_VEVN_W_VV            0x60002018
#define MASK_VEVN_W_VV             0xfc00303f
#define MATCH_VEVN_W_VX            0x6000201a
#define MASK_VEVN_W_VX             0xfe00303f
#define MATCH_VEVN_W_VV_M          0x60002038
#define MASK_VEVN_W_VV_M           0xfc00303f
#define MATCH_VEVN_W_VX_M          0x6000203a
#define MASK_VEVN_W_VX_M           0xfe00303f
#define MATCH_VODD_B_VV            0x64000018
#define MASK_VODD_B_VV             0xfc00303f
#define MATCH_VODD_B_VX            0x6400001a
#define MASK_VODD_B_VX             0xfe00303f
#define MATCH_VODD_B_VV_M          0x64000038
#define MASK_VODD_B_VV_M           0xfc00303f
#define MATCH_VODD_B_VX_M          0x6400003a
#define MASK_VODD_B_VX_M           0xfe00303f
#define MATCH_VODD_H_VV            0x64001018
#define MASK_VODD_H_VV             0xfc00303f
#define MATCH_VODD_H_VX            0x6400101a
#define MASK_VODD_H_VX             0xfe00303f
#define MATCH_VODD_H_VV_M          0x64001038
#define MASK_VODD_H_VV_M           0xfc00303f
#define MATCH_VODD_H_VX_M          0x6400103a
#define MASK_VODD_H_VX_M           0xfe00303f
#define MATCH_VODD_W_VV            0x64002018
#define MASK_VODD_W_VV             0xfc00303f
#define MATCH_VODD_W_VX            0x6400201a
#define MASK_VODD_W_VX             0xfe00303f
#define MATCH_VODD_W_VV_M          0x64002038
#define MASK_VODD_W_VV_M           0xfc00303f
#define MATCH_VODD_W_VX_M          0x6400203a
#define MASK_VODD_W_VX_M           0xfe00303f
#define MATCH_VEVNODD_B_VV         0x68000018
#define MASK_VEVNODD_B_VV          0xfc00303f
#define MATCH_VEVNODD_B_VX         0x6800001a
#define MASK_VEVNODD_B_VX          0xfe00303f
#define MATCH_VEVNODD_B_VV_M       0x68000038
#define MASK_VEVNODD_B_VV_M        0xfc00303f
#define MATCH_VEVNODD_B_VX_M       0x6800003a
#define MASK_VEVNODD_B_VX_M        0xfe00303f
#define MATCH_VEVNODD_H_VV         0x68001018
#define MASK_VEVNODD_H_VV          0xfc00303f
#define MATCH_VEVNODD_H_VX         0x6800101a
#define MASK_VEVNODD_H_VX          0xfe00303f
#define MATCH_VEVNODD_H_VV_M       0x68001038
#define MASK_VEVNODD_H_VV_M        0xfc00303f
#define MATCH_VEVNODD_H_VX_M       0x6800103a
#define MASK_VEVNODD_H_VX_M        0xfe00303f
#define MATCH_VEVNODD_W_VV         0x68002018
#define MASK_VEVNODD_W_VV          0xfc00303f
#define MATCH_VEVNODD_W_VX         0x6800201a
#define MASK_VEVNODD_W_VX          0xfe00303f
#define MATCH_VEVNODD_W_VV_M       0x68002038
#define MASK_VEVNODD_W_VV_M        0xfc00303f
#define MATCH_VEVNODD_W_VX_M       0x6800203a
#define MASK_VEVNODD_W_VX_M        0xfe00303f
#define MATCH_VZIP_B_VV            0x70000018
#define MASK_VZIP_B_VV             0xfc00303f
#define MATCH_VZIP_B_VX            0x7000001a
#define MASK_VZIP_B_VX             0xfe00303f
#define MATCH_VZIP_B_VV_M          0x70000038
#define MASK_VZIP_B_VV_M           0xfc00303f
#define MATCH_VZIP_B_VX_M          0x7000003a
#define MASK_VZIP_B_VX_M           0xfe00303f
#define MATCH_VZIP_H_VV            0x70001018
#define MASK_VZIP_H_VV             0xfc00303f
#define MATCH_VZIP_H_VX            0x7000101a
#define MASK_VZIP_H_VX             0xfe00303f
#define MATCH_VZIP_H_VV_M          0x70001038
#define MASK_VZIP_H_VV_M           0xfc00303f
#define MATCH_VZIP_H_VX_M          0x7000103a
#define MASK_VZIP_H_VX_M           0xfe00303f
#define MATCH_VZIP_W_VV            0x70002018
#define MASK_VZIP_W_VV             0xfc00303f
#define MATCH_VZIP_W_VX            0x7000201a
#define MASK_VZIP_W_VX             0xfe00303f
#define MATCH_VZIP_W_VV_M          0x70002038
#define MASK_VZIP_W_VV_M           0xfc00303f
#define MATCH_VZIP_W_VX_M          0x7000203a
#define MASK_VZIP_W_VX_M           0xfe00303f

// 3arg
#define MATCH_ACONV_VXV            0x02002005
#define MASK_ACONV_VXV             0x0200303f
#define MATCH_ADWCONV_VXV          0x02002015
#define MASK_ADWCONV_VXV           0x0200303f
#define MATCH_VDWCONV_VXV          0x00002015
#define MASK_VDWCONV_VXV           0x0200303f
#endif  // PATCHES_KELVIN_KELVIN_OPC_H_
// clang-format on