)]}'
{
  "commit": "4533fa15e03b9b59eaba6abe163cdc155deb4051",
  "tree": "6a78c8845bf02ebb36efc82bab99f7658c1ec9a2",
  "parents": [
    "818997709960c0b0eac1fd52e032e612cc0a2227"
  ],
  "author": {
    "name": "Matthew Wilson",
    "email": "mwilson@google.com",
    "time": "Wed May 22 11:35:33 2024 -0700"
  },
  "committer": {
    "name": "Matthew Wilson",
    "email": "mwilson@google.com",
    "time": "Wed May 22 18:51:28 2024 +0000"
  },
  "message": "Fix kelvin_hw_verilog target\n\nbuild now outputs .sv system verilog files instead of .v verilog\n\nChange-Id: I9954ba0af7fa816768afe05a115612e01fa940bf\nBypass-Presubmit-Reason: No presubmit exists\n",
  "tree_diff": [
    {
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      "old_mode": 33188,
      "old_path": "platforms/nexus/kelvin.mk",
      "new_id": "9b572dbbe1d7b40de15c9dec4f0d766d16229d96",
      "new_mode": 33188,
      "new_path": "platforms/nexus/kelvin.mk"
    },
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      "old_mode": 33188,
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}