| commit | ec086d23f7ff0c8790c690cb1dbe85e09a0fea7c | [log] [tgz] |
|---|---|---|
| author | RJ Ascani <rjascani@google.com> | Wed Mar 06 16:15:11 2024 -0800 |
| committer | GitHub <noreply@github.com> | Wed Mar 06 16:15:11 2024 -0800 |
| tree | 7df4aeb2a828cf36295914ebae8308760533de43 | |
| parent | 1f7f54b95ef4fc215855b850358e8770aed89287 [diff] |
Fix tests_entry & tests_post workflows (#2493) The tests_entry workflow was invalid due to parsing error when a `==` was expected instead of `=`. The tests_post needed to remove the ci:run_full label. BUG=b/327686165
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: