commit | 569ed29b9d907b1ec311aa4d413500af23124c3d | [log] [tgz] |
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author | Ryan Kuester <kuester@bdti.com> | Wed Jul 24 13:49:24 2024 -0500 |
committer | GitHub <noreply@github.com> | Wed Jul 24 18:49:24 2024 +0000 |
tree | d6bde71e96ac8fc5d66bf0b00a529d929ab7859c | |
parent | f7d989eb89edc411c3e3a50a1cb8f6c1989c9905 [diff] |
build(py): add hexdump requirement (#2637) Add the Python distribution package `hexdump`, to be used in tests and utilities which display raw memory. BUG=#2636
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
Build Type | Status |
---|---|
CI (Linux) | |
Code Sync |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
Platform | Status |
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Arduino | |
Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
Espressif Systems Dev Boards | |
Renesas Boards | TFLM Examples for Renesas Boards |
Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
Sparkfun Edge | |
Texas Instruments Dev Boards |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
Build Type | Status |
---|---|
Cortex-M | |
Hexagon | |
RISC-V | |
Xtensa | |
Generate Integration Test |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: