| commit | d027f2a55c90cf0ac0036765ba066ad40a7033ab | [log] [tgz] |
|---|---|---|
| author | RJ Ascani <rjascani@google.com> | Wed Sep 20 20:03:50 2023 -0700 |
| committer | GitHub <noreply@github.com> | Wed Sep 20 20:03:50 2023 -0700 |
| tree | 79de8da89aec0867989e0c1701d9f9d17e597d92 | |
| parent | 4cdcb6e4c34644983f3bed0bce8884ad1c1d4a25 [diff] |
Update python version in Xtensa images (#2228) The Xtensa docker images were using python 3.6, which is incompatible with some of our python packages. This has not been a problem before because the Xtensa images only perform make builds with very minimal python script usage. With the new codegen tools, Bazel is used to invoke the code generator, and this brings in the incompatible python dependencies. This PR changes the base image for the three Xtensa docker containers to pull to python instead of ubuntu. This is similar to our base TFLM docker image, which also uses the same python:3.10-bullseye base image. BUG=b/300655634
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: