Fix array out-of-bounds access in WideDynamicFuncLut (#2468)

### Problem description:

In the original code, pointer arithmetic of gain_lut and the assignment of gain_lut[4 * interval + 3] could potentially lead to out-of-bounds array access.
On certain architectures (e.g., macOS ARM64), this out-of-bounds access causes the program to crash.
BUG=None, reported issue#2464

### Solution:

Increase the size of the gain_lut_storage array by 1 to provide an extra buffer and prevent overflow during the calculation within the loop.

### Risks and considerations:

Increasing the array size will slightly increase memory usage.
In extremely resource-constrained systems, alternative algorithm implementations may need to be considered.
1 file changed
tree: 1806762d442c096a30fa7b8f5749190f29f86c37
  1. .github/
  2. ci/
  3. codegen/
  4. data/
  5. docs/
  6. python/
  7. signal/
  8. tensorflow/
  9. third_party/
  10. tools/
  11. .bazelrc
  12. .bazelversion
  13. .clang-format
  14. .editorconfig
  15. .gitignore
  16. AUTHORS
  17. BUILD
  18. CODEOWNERS
  19. CONTRIBUTING.md
  20. debugging_output.md
  21. LICENSE
  22. README.md
  23. SECURITY.md
  24. WORKSPACE
README.md

TensorFlow Lite for Microcontrollers

TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.

Additional Links:

Build Status

Official Builds

Build TypeStatus
CI (Linux)CI
Code SyncSync from Upstream TF

Community Supported TFLM Examples

This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.

PlatformStatus
ArduinoArduino Antmicro
Coral Dev Board MicroTFLM + EdgeTPU Examples for Coral Dev Board Micro
Espressif Systems Dev BoardsESP Dev Boards
Renesas BoardsTFLM Examples for Renesas Boards
Silicon Labs Dev KitsTFLM Examples for Silicon Labs Dev Kits
Sparkfun EdgeSparkfun Edge
Texas Instruments Dev BoardsTexas Instruments Dev Boards

Community Supported Kernels and Unit Tests

This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.

Build TypeStatus
Cortex-MCortex-M
HexagonHexagon
RISC-VRISC-V
XtensaXtensa
Generate Integration TestGenerate Integration Test

Contributing

See our contribution documentation.

Getting Help

A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.

The following resources may also be useful:

  1. SIG Micro email group and monthly meetings.

  2. SIG Micro gitter chat room.

  3. For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.:

Additional Documentation

RFCs

  1. Pre-allocated tensors
  2. TensorFlow Lite for Microcontrollers Port of 16x8 Quantized Operators