| commit | ae690a1d77edf5c8d3affa14a60e1eba87e0cb13 | [log] [tgz] |
|---|---|---|
| author | Shlomi Regev <shlmregev@users.noreply.github.com> | Fri May 17 19:35:38 2024 +0200 |
| committer | GitHub <noreply@github.com> | Fri May 17 17:35:38 2024 +0000 |
| tree | 6abd87efca64e5af5a20b4f5c4a2facd2c1a3e67 | |
| parent | b2cf5b3fe60bbf5e1aa790668fe0b665888f7420 [diff] |
Remove #definitions of MAX_RFFT_PWR, MIN_RFFT_PWR from Xtensa flags (#2577) First, the definition -DMIN_RFFT_PWR=MAX_RFFT_PWR is meaningless, because MAX_RFFT_PWR doesn't evaluate to a number. That's a bug. Second, both #definitions are only applicable when building Nature DSP for hifi3 and hifimini. Later archs (hifi4, hifi5) stopped using them. That's confusing to define them for all archs. Finally, there are a lot of possible #definitions and there's no reason to define these particular two in the main Xtensa makefile. A user can add any #define to XTENSA_EXTRA_CFLAGS. BUG=340206722
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: