| commit | a549448bb234cf3fed15ad5dabf83d06f82326ce | [log] [tgz] |
|---|---|---|
| author | Shlomi Regev <shlmregev@users.noreply.github.com> | Wed Feb 07 17:44:38 2024 +0100 |
| committer | GitHub <noreply@github.com> | Wed Feb 07 16:44:38 2024 +0000 |
| tree | a44346a79901853b520693d2197127f5bb3988b9 | |
| parent | 42f4bb836a5fc2a34463f35ab46fca504982fef8 [diff] |
RISC-V target makefile: make the arch, abi and mcmodel configurable. (#2447) These are the options that change between different riscv configurations. BUG=321746747
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: