| commit | 9d1dd7b0cac51b8dcd584c43eb032e1ce135a718 | [log] [tgz] |
|---|---|---|
| author | suleshahid <110432064+suleshahid@users.noreply.github.com> | Wed Jan 31 11:24:51 2024 -0800 |
| committer | GitHub <noreply@github.com> | Wed Jan 31 19:24:51 2024 +0000 |
| tree | 47a26068e9d4b727e0cfb61aa9cd9baebe8734ae | |
| parent | 13de409adee3d529255f17fea7d9be982679df60 [diff] |
revert xtensa include vector (#2441) post merge is broken because of it, reverting for now. BUG=[323060097](https://b.corp.google.com/issues/323060097)
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: