| From 70e504abb13fe56244250ac7ac58b1b5232481c7 Mon Sep 17 00:00:00 2001 |
| From: TFLM <tflm@google.com> |
| Date: Mon, 28 Aug 2023 16:07:22 +0000 |
| Subject: [PATCH] TFLM patch |
| |
| --- |
| targets/corstone-300/platform.ld | 10 ++++------ |
| targets/corstone-300/platform.scatter | 7 ++++--- |
| targets/corstone-300/retarget.c | 16 ++++++++-------- |
| 3 files changed, 16 insertions(+), 17 deletions(-) |
| |
| diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld |
| index ec58acc..51c93ca 100644 |
| --- a/targets/corstone-300/platform.ld |
| +++ b/targets/corstone-300/platform.ld |
| @@ -75,7 +75,7 @@ |
| #define ETHOSU_ARENA 1 |
| #endif |
| |
| -__STACK_SIZE = 0x00008000; |
| +__STACK_SIZE = 0x00030000; |
| __HEAP_SIZE = 0x00008000; |
| |
| MEMORY |
| @@ -83,7 +83,7 @@ MEMORY |
| ITCM (rx) : ORIGIN = 0x10000000, LENGTH = 0x00080000 |
| BRAM (rw) : ORIGIN = 0x11000000, LENGTH = 0x00400000 |
| DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 0x00080000 |
| - SRAM (rw) : ORIGIN = 0x31000000, LENGTH = 0x00200000 |
| + SRAM (rw) : ORIGIN = 0x31000000, LENGTH = 0x02000000 |
| DDR (rwx) : ORIGIN = 0x70000000, LENGTH = 0x60000000 |
| } |
| |
| @@ -150,9 +150,6 @@ SECTIONS |
| *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) |
| *(SORT(.dtors.*)) |
| *(.dtors) |
| - |
| - *(.rodata*) |
| - |
| KEEP(*(.eh_frame*)) |
| } > ITCM :rom_exec |
| |
| @@ -275,6 +272,7 @@ SECTIONS |
| *(network_model_sec) |
| #endif |
| * (expected_output_data_sec) |
| + *(.rodata*) |
| } > DDR :rom_dram |
| |
| __eddr_data = ALIGN (16) ; |
| @@ -293,7 +291,7 @@ SECTIONS |
| *(COMMON) |
| . = ALIGN(4); |
| __bss_end__ = .; |
| - } > DTCM :null |
| + } > SRAM :null |
| |
| .heap (COPY) : |
| { |
| diff --git a/targets/corstone-300/platform.scatter b/targets/corstone-300/platform.scatter |
| index fab12d1..2180aca 100644 |
| --- a/targets/corstone-300/platform.scatter |
| +++ b/targets/corstone-300/platform.scatter |
| @@ -1,3 +1,4 @@ |
| +#!cpp |
| /* |
| * Copyright (c) 2019-2021 Arm Limited. All rights reserved. |
| * |
| @@ -76,7 +77,7 @@ |
| #endif |
| |
| #ifndef STACK_SIZE |
| -#define STACK_SIZE 0x8000 |
| +#define STACK_SIZE 0x20000 |
| #endif |
| |
| #ifndef HEAP_SIZE |
| @@ -108,7 +109,7 @@ |
| #define DTCM_SIZE 0x00080000 |
| |
| #define SRAM_START 0x31000000 |
| -#define SRAM_SIZE 0x00200000 |
| +#define SRAM_SIZE 0x02000000 |
| |
| #define DDR_START 0x70000000 |
| #define DDR_SIZE 0x02000000 |
| @@ -136,7 +137,6 @@ APP_IMAGE LR_START LR_SIZE |
| ; Make sure reset_handler ends up in root segment, when split across |
| ; ITCM and DTCM |
| startup_ARMCM55.o |
| - .ANY (+RO) |
| } |
| |
| #if defined(USE_TRUSTZONE) && defined(TRUSTZONE_SECURE) |
| @@ -209,6 +209,7 @@ LOAD_REGION_1 DDR_START DDR_SIZE |
| * (input_data_sec) |
| * (expected_output_data_sec) |
| * (output_data_sec) |
| + .ANY (+RO) |
| } |
| |
| #if (ETHOSU_ARENA == 1) |
| diff --git a/targets/corstone-300/retarget.c b/targets/corstone-300/retarget.c |
| index 4bde44d..b510ad8 100644 |
| --- a/targets/corstone-300/retarget.c |
| +++ b/targets/corstone-300/retarget.c |
| @@ -172,14 +172,6 @@ long RETARGET(_flen)(FILEHANDLE fh) { |
| return -1; |
| } |
| |
| -int RETARGET(_tmpnam)(char *name, int sig, unsigned maxlen) { |
| - (void)name; |
| - (void)sig; |
| - (void)maxlen; |
| - |
| - return 1; |
| -} |
| - |
| char *RETARGET(_command_string)(char *cmd, int len) { |
| (void)len; |
| |
| @@ -274,3 +266,11 @@ int ferror(FILE *f) { |
| return EOF; |
| } |
| #endif |
| + |
| +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) |
| +#else |
| +void RETARGET(exit)(int return_code) { |
| + RETARGET(_exit)(return_code); |
| + while (1) {} |
| +} |
| +#endif |
| -- |
| 2.42.0.rc2.253.gd59a3bf2b4-goog |
| |
