commit | bb4fc83d1083e75c2cae0dbd59332a29d7a8afe7 | [log] [tgz] |
---|---|---|
author | RJ Ascani <rjascani@google.com> | Thu Mar 28 11:56:17 2024 -0700 |
committer | GitHub <noreply@github.com> | Thu Mar 28 18:56:17 2024 +0000 |
tree | ada08137d8db1c9ea8afd4999941c6fb008aa517 | |
parent | 1b2245f0387c0f299db1daaef2f71a824e57cbf8 [diff] |
Pass cc_op_defs as deps, not srcs, to underlying cc_library rule (#2522) This is because the targets are cc_libraries, not C++ source files. BUG=cl/619288666
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
Build Type | Status |
---|---|
CI (Linux) | |
Code Sync |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
Platform | Status |
---|---|
Arduino | |
Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
Espressif Systems Dev Boards | |
Renesas Boards | TFLM Examples for Renesas Boards |
Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
Sparkfun Edge | |
Texas Instruments Dev Boards |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
Build Type | Status |
---|---|
Cortex-M | |
Hexagon | |
RISC-V | |
Xtensa | |
Generate Integration Test |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: