| commit | 79e3f35f3ce03c4f24fc9dfef40fcff5827b0112 | [log] [tgz] |
|---|---|---|
| author | Steven Toribio <34755817+turbotoribio@users.noreply.github.com> | Tue Mar 19 14:56:48 2024 -0700 |
| committer | GitHub <noreply@github.com> | Tue Mar 19 21:56:48 2024 +0000 |
| tree | bd9d82d7d75dd8efd653c480a3fe238a1169cf75 | |
| parent | 5e17f076bc3780e6e3df614279f7bb898a779a08 [diff] |
Remove the `output_to_genfiles = True` parameter from Starlark rules (#2512) corresponding [g3 cl](https://critique.corp.google.com/cl/616227359) BUG=N/A
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: