| commit | 6c6e9b3ecae2cde5a832ff2363d85ba7267d69de | [log] [tgz] |
|---|---|---|
| author | Ryan Kuester <kuester@bdti.com> | Thu Aug 01 16:30:54 2024 -0500 |
| committer | GitHub <noreply@github.com> | Thu Aug 01 21:30:54 2024 +0000 |
| tree | 8a4d27bed2ffa55f0b714b01513e7ece718347a3 | |
| parent | f309046ae28326b943894a4916f3d7bef65ebe9d [diff] |
build: begin using -std=c++17 and c17 in Makefile builds (#2648)
Begin using -std=c++17 and -std=c17 in Makefile builds on
all platforms. Bazel builds have been using C++17 since 52c9568.
Set `-stdlib=libc++ on xt-clang` on Xtensa to add C++17 library
support in addition to compiler support. From the xt-clang docs:
Starting with the RI-2019.1 release, XT-CLANG has included support
for C++14 and C++17 language features. The compiler support for
C++14 and C++17 is accompanied by the C++ library from the LLVM
project. This library can be selected with the -stdlib=libc++
option, and this is strongly recommended when compiling with
-std=c++14 or - std=c++17. Starting with the RI-2021.6 release, two
additional versions of this C++ library are provided— one that
excludes support for exception handling, and one that excludes both
exception handling and run-time type identification. These libraries
can be selected with -stdlib=libc ++-e and -stdlib=libc++-re options
respectively.
Based on the `docker run` command in
tflite-micro/.github/workflows/xtensa_presubmit.yml, our CI is
currently using RI-2020.4.
Refactor the make/ext_libs/xtensa_download.sh script to make it eaiser
to patch downloads for all Xtensa platforms. The old script made overly
strict assumptions about the name of the patch.
Patch the Xtensa vision_p6 platform download xi_tflmlib_vision_p6 for
compatibility with the C++ library standard. Use the header <climits> to
access constants such as INT_MAX.
BUG=#2650TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: