| commit | 749892abf4ec2c141b63f6967867b00cf74064e4 | [log] [tgz] |
|---|---|---|
| author | Shlomi Regev <shlmregev@users.noreply.github.com> | Thu Feb 15 17:48:20 2024 +0100 |
| committer | GitHub <noreply@github.com> | Thu Feb 15 16:48:20 2024 +0000 |
| tree | b6bdef36f28950ea3f7af96f7bc3160e3cd57d94 | |
| parent | a00b9a0364a9a44a135da820518b6968bfcabb8b [diff] |
Remove unused variables in Xtensa implmenetation of LSTM. (#2456) We only started getting "unused variable" errors with latest versions of the Xtensa toolchain. BUG=323856831
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: