| commit | c1a5f16129afbfa057988d3ded31456aa68feb6d | [log] [tgz] |
|---|---|---|
| author | Steven Toribio <34755817+turbotoribio@users.noreply.github.com> | Tue Nov 28 14:06:25 2023 -0800 |
| committer | GitHub <noreply@github.com> | Tue Nov 28 22:06:25 2023 +0000 |
| tree | 40426076d3f68c2b79821abc4fffa520dc7aa78e | |
| parent | 50433190cf493d5b9a0dd729a05975245dfc8433 [diff] |
Adding ReadMe for Layer by Layer Debug Targets (#2305) Adding ReadMe with Documentation about how to use the following targets in the `tenorflow/lite/micro/tools` directory: * layer_by_layer_output_tool * layer_by_layer_debugger BUG=[b/288141725](https://b.corp.google.com/issues/288141725)
TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.
Additional Links:
| Build Type | Status |
|---|---|
| CI (Linux) |  |
| Code Sync |  |
This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.
| Platform | Status |
|---|---|
| Arduino |   |
| Coral Dev Board Micro | TFLM + EdgeTPU Examples for Coral Dev Board Micro |
| Espressif Systems Dev Boards |  |
| Renesas Boards | TFLM Examples for Renesas Boards |
| Silicon Labs Dev Kits | TFLM Examples for Silicon Labs Dev Kits |
| Sparkfun Edge |  |
| Texas Instruments Dev Boards |  |
This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.
| Build Type | Status |
|---|---|
| Cortex-M |  |
| Hexagon |  |
| RISC-V |  |
| Xtensa |  |
| Generate Integration Test |  |
See our contribution documentation.
A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.
The following resources may also be useful:
SIG Micro email group and monthly meetings.
SIG Micro gitter chat room.
For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.: