Google Git
Sign in
opensecura / 3p / tensorflow / tflite-micro / 60284939db58e01f0dc364f49c14cd9c093f5950
commit60284939db58e01f0dc364f49c14cd9c093f5950[log] [tgz]
authorDavid Davis <ddavis-2015@users.noreply.github.com>Fri May 17 17:31:42 2024 -0700
committerGitHub <noreply@github.com>Sat May 18 00:31:42 2024 +0000
treed97cf5519ecdd1f62ee250c9fefc85d0d3a8d8a8
parent94e7cbac65ebb1378a95340c7969dfdb54648204 [diff]
Fixes for generic benchmark wrt corstone-300 (#2581)

@tensorflow/micro

Update README to use cortex-m4 (it has instruction cycle timer)

Update README sample output to reflect cortex-m4

Update test script to not use Ethos-U co-processor (instruction cycle timer non-functional in simulator) when running benchmark.

bug=fixes #2580
2 files changed
tree: d97cf5519ecdd1f62ee250c9fefc85d0d3a8d8a8
  1. .github/
  2. ci/
  3. codegen/
  4. data/
  5. docs/
  6. python/
  7. signal/
  8. tensorflow/
  9. third_party/
  10. tools/
  11. .bazelrc
  12. .bazelversion
  13. .clang-format
  14. .editorconfig
  15. .gitignore
  16. AUTHORS
  17. BUILD
  18. CODEOWNERS
  19. CONTRIBUTING.md
  20. debugging_output.md
  21. LICENSE
  22. README.md
  23. SECURITY.md
  24. WORKSPACE
README.md

TensorFlow Lite for Microcontrollers

TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.

Additional Links:

Build Status

Official Builds

Build TypeStatus
CI (Linux)CI
Code SyncSync from Upstream TF

Community Supported TFLM Examples

This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.

PlatformStatus
ArduinoArduino Antmicro
Coral Dev Board MicroTFLM + EdgeTPU Examples for Coral Dev Board Micro
Espressif Systems Dev BoardsESP Dev Boards
Renesas BoardsTFLM Examples for Renesas Boards
Silicon Labs Dev KitsTFLM Examples for Silicon Labs Dev Kits
Sparkfun EdgeSparkfun Edge
Texas Instruments Dev BoardsTexas Instruments Dev Boards

Community Supported Kernels and Unit Tests

This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.

Build TypeStatus
Cortex-MCortex-M
HexagonHexagon
RISC-VRISC-V
XtensaXtensa
Generate Integration TestGenerate Integration Test

Contributing

See our contribution documentation.

Getting Help

A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.

The following resources may also be useful:

  1. SIG Micro email group and monthly meetings.

  2. SIG Micro gitter chat room.

  3. For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.:

Additional Documentation

RFCs

  1. Pre-allocated tensors
  2. TensorFlow Lite for Microcontrollers Port of 16x8 Quantized Operators