)]}'
{
  "commit": "9ff32b9786e8e8c50e0300495d600c5b05bef40e",
  "tree": "c873b05a4fb3432f490960e336401ce67b36ae0d",
  "parents": [
    "6a43e131ff2a85f2e1884559477cac14236c88f7"
  ],
  "author": {
    "name": "Axel Heider",
    "email": "axelheider@gmx.de",
    "time": "Wed Sep 23 04:35:29 2020 +0200"
  },
  "committer": {
    "name": "Oliver Scott",
    "email": "Oliver.Scott@data61.csiro.au",
    "time": "Wed Sep 30 11:12:28 2020 +1000"
  },
  "message": "libplatsupport,zynq: fix clearing isr bits\n\nSigned-off-by: Axel Heider \u003caxelheider@gmx.de\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b0a1de647abaf215b675a8c4ce8846bb18a00240",
      "old_mode": 33188,
      "old_path": "libplatsupport/src/mach/zynq/serial.c",
      "new_id": "4c0f55d1a09cf180cc0d28fe6228b91af9a75be3",
      "new_mode": 33188,
      "new_path": "libplatsupport/src/mach/zynq/serial.c"
    }
  ]
}