tree cd9b6600a8e7438da69f9e5955fe6c5931682b93
parent f00ee013b1a576358b202fcb48dffab776616214
author Ahmed Charles <acharles@outlook.com> 1658033921 -0700
committer Sam Leffler <sleffler@google.com> 1664807784 +0000

Clarify choice of illegal instruction encoding

The unprivileged spec says the following:

We consider it a feature that any length of instruction containing all
zero bits is not legal, as this quickly traps erroneous jumps into
zeroed memory regions. Similarly, we also reserve the instruction
encoding containing all ones to be an illegal instruction, to catch the
other common pattern observed with unprogrammed non-volatile memory
devices, disconnected memory buses, or broken memory devices.

Software can rely on a naturally aligned 32-bit word containing zero to
act as an illegal instruction on all RISC-V implementations, to be used
by software where an illegal instruction is explicitly desired. Defining
a corresponding known illegal value for all ones is more difficult due
to the variable-length encoding. Software cannot generally use the
illegal value of ILEN bits of all 1s, as software might not know ILEN
for the eventual target machine (e.g., if software is compiled into a
standard binary library used by many different machines). Defining a
32-bit word of all ones as illegal was also considered, as all machines
must support a 32-bit instruction size, but this requires the
instruction-fetch unit on machines with ILEN>32 report an illegal
instruction exception rather than access fault when such an instruction
borders a protection boundary, complicating variable-instruction-length
fetch and decode.

Signed-off-by: Ahmed Charles <acharles@outlook.com>
Change-Id: I86c1b165efaaec0cb4c942da37f91903d737edb6