)]}'
{
  "commit": "707000bbe3a927cbd84b6b33a98419c09e68d801",
  "tree": "94ca4af45583bbd9514afb463cda9f068403e1e5",
  "parents": [
    "dd02025f89e9813fd39ff875d3c81056ccfc0bbc"
  ],
  "author": {
    "name": "Curtis Millar",
    "email": "2741168+xurtis@users.noreply.github.com",
    "time": "Tue Sep 07 16:15:24 2021 +1000"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Sep 07 16:15:24 2021 +1000"
  },
  "message": "Do not disable counters when reading on aarch64 (#32)\n\nIf the cycle counter is disabled during a read, the operation can be\r\npreempted and lose the count of cycles for the duration of the\r\npreemption.\r\n\r\nSigned-off-by: Curtis Millar \u003ccurtis.millar@data61.csiro.au\u003e\r\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4d1d6512588099af139c8b29cb5f20d6f9e98ffa",
      "old_mode": 33188,
      "old_path": "libsel4bench/arch_include/arm/armv/armv8-a/sel4bench/armv/sel4bench.h",
      "new_id": "f438b9afefe5087c67762d7dbc70c129d366ed8e",
      "new_mode": 33188,
      "new_path": "libsel4bench/arch_include/arm/armv/armv8-a/sel4bench/armv/sel4bench.h"
    }
  ]
}