blob: fe6a7d12f286834b5e44c24d5b2a8667ac643ca9 [file] [log] [blame]
// fpga_cw310 target uses different clock frequencies
// https://github.com/lowRISC/opentitan/blob/2fb276797e0dcda96195b1e4617f2aac82a925f0/sw/device/lib/arch/device_fpga_cw310.c
using "./opentitan-earlgrey.repl"
cpu0:
PerformanceInMips: 10
rv_timer:
frequency: 2500000
timer_aon:
frequency: 250000