commit 09e50cf0767f02988f26cbfd68d8ee03e1a0fdf5
author Mateusz Holenko <mholenko@antmicro.com> Tue Jun 18 17:57:09 2024 +0200
committer Mateusz Holenko <mholenko@antmicro.com> Wed Jun 19 20:20:47 2024 +0200
tree 914629ea43028e281da90ecffbbfa3ce536144a5
parent 76439907b25f7f2a5f457a5d37986dfb7d0948d4

[DEV] Add basic MAX32655 UART model

src/Infrastructure

diff --git a/src/Infrastructure b/src/Infrastructure
index 4314b89..8db9a2a 160000
--- a/src/Infrastructure
+++ b/src/Infrastructure
@@ -1 +1 @@
-Subproject commit 4314b890fed14eb83735f81cf53cd94ef074526a
+Subproject commit 8db9a2a1028f1be99f0c8a8417bd46a5cc2697a3

tools/dts2repl

diff --git a/tools/dts2repl b/tools/dts2repl
index 2fe0e30..05703b9 160000
--- a/tools/dts2repl
+++ b/tools/dts2repl
@@ -1 +1 @@
-Subproject commit 2fe0e300924182c75789e0ad6792ad2fde514e23
+Subproject commit 05703b974c87ee19acf03cfa21df320c970fb9e8