)]}'
{
  "commit": "e7e1fb42a612d7ea0f1d93b24a65fade0095a9e0",
  "tree": "433d420aaa3dabe42f41a127700501df4d2eec6c",
  "parents": [
    "315c3a35529b421931604b4ed7a331ab47548eb8"
  ],
  "author": {
    "name": "Samarth Narang",
    "email": "70980689+snarang181@users.noreply.github.com",
    "time": "Wed Sep 30 10:50:08 2026 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Sep 30 16:50:08 2026 +0200"
  },
  "message": "[CUDA] Raise the default PTX level for sm_89, sm_120 and sm_121 (#24976)\n\nPick the default per architecture: 8.8 for sm_121, 8.7 for sm_120 and\n8.4 for sm_89. An explicit --iree-cuda-target-features can still\noverride this.\n\nThe CUDA target always passes an explicit PTX level to the NVPTX backend\nand only raised the +ptx76 default to 7.8 for sm_89. That is below what\nthe backend accepts for Blackwell, so `--iree-cuda-target\u003dsm_120`\n(minimum 8.7) and `sm_121` (minimum 8.8) failed for every program, and\nbelow what the FP8 mma.sync intrinsics selected by default on Ada need,\nso an f8E4M3FN matmul on sm_89 failed to select\n`llvm.nvvm.mma.m16n8k32.row.col.f32.e4m3.e4m3.f32` (PTX 8.4).\n\nFixes #24959\n\nAssisted-by: Claude Code\n\nSigned-off-by: Samarth Narang \u003csn2910@nyu.edu\u003e",
  "tree_diff": [
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      "type": "modify",
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      "old_mode": 33188,
      "old_path": "compiler/plugins/target/CUDA/CUDATarget.cpp",
      "new_id": "50bfa182c1a585786618fec4af8490ee0d70e332",
      "new_mode": 33188,
      "new_path": "compiler/plugins/target/CUDA/CUDATarget.cpp"
    },
    {
      "type": "modify",
      "old_id": "2fb107214aa32d6c87fbfa38d268dc303928124c",
      "old_mode": 33188,
      "old_path": "compiler/plugins/target/CUDA/test/target_device_features.mlir",
      "new_id": "439d52ace61f188775fb54e952fef16fd87534ff",
      "new_mode": 33188,
      "new_path": "compiler/plugins/target/CUDA/test/target_device_features.mlir"
    }
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}