)]}' { "commit": "c946164191f6f8ce0739aa310f7e67bc51bd405f", "tree": "ef7b77c9f688602d3c360166402cb22b2fca1ba1", "parents": [ "a3ec91893f2a53752a531df88929cc0e628dbb20" ], "author": { "name": "Jelle Schühmacher", "email": "schuehmacher@roofline.ai", "time": "Thu Oct 01 21:46:49 2026 +0200" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Oct 01 21:46:49 2026 +0200" }, "message": "Integrate LLVM to llvm/llvm-project@a938559a9145 (#24982)\n\nUpdates LLVM to llvm/llvm-project@a938559a9145, retaining the GPU\nmin/maxnumf carry patch from llvm/llvm-project#226903.\n\nCompatibility changes:\n\n- Bump StableHLO to openxla/stablehlo@c2eaf28a to pick up compatibility\nwith strict property assembly formats (llvm/llvm-project@c495a9b796c4).\n Upstream also covers these previously carried IREE fixes:\n - Migrate complex element handling to `mlir::Complex`\n (iree-org/stablehlo@28549ef5).\n - Remove obsolete DenseMap empty/tombstone key handling\n (iree-org/stablehlo@a2727e57).\n - Preserve enum assembly syntax without angle brackets\n (iree-org/stablehlo@50a9d75a).\n- Temporarily opt affected IREE dialects and Torch-MLIR TMTensor out of\n strict property assembly formats to preserve existing syntax\n (llvm/llvm-project@c495a9b796c4).\n- Replace `checkParallelRegions` with `mayHaveParallelRegions`,\npreserving\n existing bufferization behavior (llvm/llvm-project@d6048f5ff3bd).\n- Use DataLayout-aware constant GEP construction in LLVMCPU\n (llvm/llvm-project@2a6247359ee5).\n- Keep widening visible through shape casts for CPU custom kernels and\n SPIR-V dot products after (llvm/llvm-project@2c298348bfe1)\n- Update the TOSA constant check for its new assembly format\n (llvm/llvm-project@fe5ace607b58)\n- Carry the MMA slice-cache correction for the regression introduced \n by (llvm/llvm-project@d287e55d0302)\n\nAssisted-by: Codex\n\n---------\n\nSigned-off-by: Jelle Schühmacher \u003cschuehmacher@roofline.ai\u003e", "tree_diff": [ { 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