)]}'
{
  "commit": "c08362a052829f746990c8424ce0704137bcc048",
  "tree": "1a43794a6f60c145b74dec8d69237c1ec5685c73",
  "parents": [
    "114a1427810f3da0234f98c22f58390773b0489a"
  ],
  "author": {
    "name": "Benoit Jacob",
    "email": "jacob.benoit.1@gmail.com",
    "time": "Mon Oct 21 15:23:25 2024 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Oct 21 15:23:25 2024 -0400"
  },
  "message": "GPU target parameters for data tiling. (#18839)\n\nThis replaces some constants what were hardcoded in\r\nGPUMaterializeEncoding.cpp by actual GPU target parameters.\r\n\r\nThe logic in `getSwizzle` was doing wonky things with its own local\r\n`const int targetPreferredLoadBitWidth \u003d 128;`, using it in a helper\r\nfunction inferring interleaving dimensions. That was all dating back to\r\nearly days -- that was effectively trying to infer which inner-most\r\ndimensions to skip to get at the first non-Internal dimension... so that\r\nis one more thing that we can fix now that we have\r\n`TileSwizzle::Dim::Kind`. See `getInnermostNonInternalDimIdx`.\r\n\r\nThe heuristic in `chooseDataTiledMMAAttr` becomes much more robust, and\r\ntested more extensively by `gpu_materialize_encoding.mlir`, now that we\r\ncan pass arbitrary parameters in ad-hoc `#iree_gpu.target` attributes,\r\nsee the test updates. It\u0027s unfortunately verbose (one screenful of MLIR\r\ncode for each testcase) because each has to be a complete function with\r\n`flow.dispatch` ops, but that\u0027s a separate problem.\r\n\r\n---------\r\n\r\nSigned-off-by: Benoit Jacob \u003cjacob.benoit.1@gmail.com\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b7a5ab68a014d2265c14637d3c35b51d0e4cdfc4",
      "old_mode": 33188,
      "old_path": "compiler/plugins/target/ROCM/test/target_device_features.mlir",
      "new_id": "726f52551744de83e6943c35f55c8bfbee17bf0a",
      "new_mode": 33188,
      "new_path": "compiler/plugins/target/ROCM/test/target_device_features.mlir"
    },
    {
      "type": "modify",
      "old_id": "5f0d60660b845eca457f8b4c5d94bf876dc8a43e",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/GPU/GPUMaterializeEncoding.cpp",
      "new_id": "de80cc96640233123cf8f38134fe7aebc7b383d0",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/GPU/GPUMaterializeEncoding.cpp"
    },
    {
      "type": "modify",
      "old_id": "fd97eaf051d5225b6c39e35332e7c2d0cbe71333",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/GPU/test/gpu_materialize_encoding.mlir",
      "new_id": "1c3a0589815ddc867e84db1750ffc8211a1b6aaf",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/GPU/test/gpu_materialize_encoding.mlir"
    },
    {
      "type": "modify",
      "old_id": "33ddd044d588a0e5dcd5a970f60b70a616d569fc",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/GPUTileSwizzleUtils.cpp",
      "new_id": "7ef46a6c0d9aa2de8604a73cf825ff5c4f942661",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/GPUTileSwizzleUtils.cpp"
    },
    {
      "type": "modify",
      "old_id": "1f2cad748c0816c0d398363eb064a44f5dec56df",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/IREEGPUAttrs.td",
      "new_id": "d04e9fefe5b9eda6c2df73983be82d78ad00c733",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/IREEGPUAttrs.td"
    },
    {
      "type": "modify",
      "old_id": "ef04a2282c5ecab7126096ec5182081a25c5c677",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/KnownTargets.cpp",
      "new_id": "4fa5074e67a4c9d64f5117e44d3971845d319ed7",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/KnownTargets.cpp"
    }
  ]
}
