Plumb dynamic shape support through for Vulkan and VMVX (#6917)

This commit plumbs dynamic shape support through for both Vulkan and
VMVX. They rely on 1-D MemRef and running `FlattenMemRefSubspanPass`
in advance, instead of MemRef descriptors.

In order to enable dynamic shape support, we need to carry the
SSA values for dynamic dimensions down the CodeGen pipeline so that
we can linearize the index calculation in `FlattenMemRefSubspanPass`.
We have such information tightly associated with various ops at
the Flow level, but when outlining executables and materializing
HAL interface, the association is broken down. Instead, `tie_shape`
ops are used to carry such information. It's structurally difficult
to maintain and convert.

So this commit changes the `hal.interface.binding.subspan` to carry
the dynamic dimension SSA values by itself, like many other ops
in Flow/HAL. It's a natural change that simplifies lots of analysis
and transformation. For example, we don't need to maintain the two
step conversion at CPU side (first generating an undefined MemRef
descriptor when handling the `subspan` op, and then filling its
content when handling the `tie_shape` op). It also makes the
intervals of HAL more akin to Flow on this front.

Other changes are mostly natural based on that:

* `MaterializeInterfaces` picks up the information from `tie_shape`
  ops and attaches them to `subspan` ops.
* `FlattenBindingSubspan` reads the dynamic dimensions to perform
  index linearization.
* `ConvertToLLVM` now generates the full MemRef descriptor from
  `subspan` ops.
* A new pass is added to fold `memref.dim`/`tensor.dim` ops over
  shape carrying ops.

This puts IREE CodeGen dynamic shape support for Vulkan/VMvX in
a very nice state:

Because we run `FoldSubViewOpsPass` in advance, there won't be
intermediate MemRefs (coming from `subview` ops). So load/stores
directly take in HAL `subspan` ops. By definition in IREE we have
tightly packed buffers so all MemRefs coming from subspans should
have strides of the total element count in inner dimensions. So symbolic
strides in subspan ops' AffineMaps correspond to SSA values for
dimension sizes (or their products). Offsets are attached to subspan
ops as SSA values, but then they are "transferred" to load/store ops
during memref flattening, by being part of the index linearization
calculation.
54 files changed
tree: 57c624a993de2beff9868d63d1614a50be0f56c3
  1. .github/
  2. benchmarks/
  3. bindings/
  4. build_tools/
  5. colab/
  6. docs/
  7. experimental/
  8. integrations/
  9. iree/
  10. llvm-external-projects/
  11. scripts/
  12. third_party/
  13. .bazelignore
  14. .bazelrc
  15. .bazelversion
  16. .clang-format
  17. .gitignore
  18. .gitmodules
  19. .style.yapf
  20. .yamllint.yml
  21. AUTHORS
  22. BUILD.bazel
  23. CMakeLists.txt
  24. configure_bazel.py
  25. CONTRIBUTING.md
  26. LICENSE
  27. README.md
  28. SUBMODULE_VERSIONS.txt
  29. WORKSPACE
README.md

IREE: Intermediate Representation Execution Environment

IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.

See our website for project details, user guides, and instructions on building from source.

Project Status

IREE is still in its early phase. We have settled down on the overarching infrastructure and are actively improving various software components as well as project logistics. It is still quite far from ready for everyday use and is made available without any support at the moment. With that said, we welcome any kind of feedback on any communication channels!

Communication Channels

Related Project Channels

  • MLIR topic within LLVM Discourse: IREE is enabled by and heavily relies on MLIR. IREE sometimes is referred to in certain MLIR discussions. Useful if you are also interested in MLIR evolution.

Build Status

CI SystemBuild SystemPlatformArchitectureConfiguration / ComponentStatus
KokoroBazelLinuxx86-64kokoro_status_bazel/linux/x86-swiftshader/core
KokoroCMake & BazelLinuxx86-64 (swiftshader)Integrationskokoro status cmake-bazel/linux/x86-swiftshader
KokoroCMake & BazelLinuxx86-64 (turing)Integrationskokoro status cmake-bazel/linux/x86-turing
KokoroCMakeLinuxx86-64 (swiftshader)kokoro status cmake/linux/x86-swiftshader
KokoroCMakeLinuxx86-64 (swiftshader)asankokoro status cmake/linux/x86-swiftshader-asan
KokoroCMakeLinuxx86-64 (turing)kokoro status cmake/linux/x86-turing
KokoroCMakeAndroidarm64-v8aRuntime (build only)kokoro status cmake/android/arm64-v8a
KokoroCMakeBare Metalrisc-v-32Runtimekokoro status cmake/baremetal/riscv32
KokoroCMakeLinuxrisc-v-64Runtimekokoro status cmake/linux/riscv64
BuildkiteCMakeAndroidarm64-v8aRuntimebuildkite status iree-android-arm64-v8a
BuildKiteCMakeAndroidarm64-v8aRuntime Benchmarksbuildkite status iree-benchmark
BuildKiteCMakeLinuxx86-64Tracing + Standalone Runtimebuildkite status iree-build-configurations

Presentations and Talks

  • 2020-08-20: IREE CodeGen: MLIR Open Design Meeting Presentation (recording and slides)
  • 2020-03-18: Interactive HAL IR Walkthrough (recording)
  • 2020-01-31: End-to-end MLIR Workflow in IREE: MLIR Open Design Meeting Presentation (recording and slides)

License

IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.