)]}'
{
  "commit": "be57650d3723e4b8b44a341bd007fcb02062dd5b",
  "tree": "2c20874109b74792eb3d5c618c48aa79d71c4ac3",
  "parents": [
    "6ec0a37c41c0dec313b5f69df6238370e07e303a"
  ],
  "author": {
    "name": "Benoit Jacob",
    "email": "jacob.benoit.1@gmail.com",
    "time": "Wed Jul 01 10:36:30 2026 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Jul 01 16:36:30 2026 +0200"
  },
  "message": "[Codegen][CPU] Drop the ACC stride from the inner_tiled ukernel ABI. (#24652)\n\nNew bottom of the LLVMCPU C-ukernel stack.\n\nThe ACC stride threaded to the C ukernels is always a compile-time\nconstant\nequal to one intrinsic\u0027s ACC fragment size (the data-tiled ACC tile is\ncontiguous), so it folds to a constant after inlining and carries no\ninformation the intrinsic-specific ukernel doesn\u0027t already encode. This\ndrops\nit:\n\n- `IREECPUAttrs.cpp`: remove `getAccInnermostCrossIntrinsicDim`; build\nthe\n`ukernel.generic` with `num_strided_outer_dims\u003d0`, so all shaped\noperands\n  (LHS, RHS, ACC) lower to `(base, offset)` only.\n- Both seed ukernel `.c` signatures lose the `acc_stride` parameter.\n\nThis addresses review feedback on the now-merged #24569 / #24571 (why\npass a\nper-operand `strided_dims` array, and why pass an ACC stride that\u0027s\nstatically\nknown). It makes the three operands uniform and removes the\n`getAccInnermostCrossIntrinsicDim` swizzle machinery.\n\nVerified: the lowered `llvm.call` to the ukernel now has no stride\nargument,\nand the ukernel lit tests (`lower_inner_tiled_to_bitcode_ukernel*`,\n`e2e_inner_tiled_pipeline`, `select_ukernel`) pass.\n\nProgress towards https://github.com/iree-org/iree/issues/24574.\n\nSigned-off-by: Benoit Jacob \u003cjacob.benoit.1@gmail.com\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "978c47827e583ca6aa3c92609182a32e0c93a0e6",
      "old_mode": 33188,
      "old_path": "compiler/plugins/target/LLVMCPU/builtins/ukernel/iree_uk_mma_x86_avx512bf16_1x16x2_f32_bf16.c",
      "new_id": "c7a57289b20c7dec75d2f2011594256eca2c55c2",
      "new_mode": 33188,
      "new_path": "compiler/plugins/target/LLVMCPU/builtins/ukernel/iree_uk_mma_x86_avx512bf16_1x16x2_f32_bf16.c"
    },
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "compiler/plugins/target/LLVMCPU/builtins/ukernel/iree_uk_mma_x86_avx512vnni_16x16x2_i32_i8_casti16.c",
      "new_id": "9e27639cf53279dc0b2dfb4576610684d669f8f9",
      "new_mode": 33188,
      "new_path": "compiler/plugins/target/LLVMCPU/builtins/ukernel/iree_uk_mma_x86_avx512vnni_16x16x2_i32_i8_casti16.c"
    },
    {
      "type": "modify",
      "old_id": "2eb1f4381c6a1011eced7298a0829eccef0975f6",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/CPU/IR/IREECPUAttrs.cpp",
      "new_id": "8997f88491a809c57bf8faffa107412319a30642",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/CPU/IR/IREECPUAttrs.cpp"
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}