[Codegen][CPU] Wire LowerBitcodeUKernels into the Mmt4dTilingExpert pipeline. (#24570)

Completes the new-style C-ukernel pipeline integration:

* `LLVMCPUTarget.cpp`: install `iree_codegen.ukernel_provider =
#iree_cpu.ukernel_provider` on every LLVMCPU executable target config
whenever `--iree-llvmcpu-enable-llvm-ukernels` is non-empty. This
mirrors what ROCM does and is what lets the generic
`LowerBitcodeUKernelsPass` find the CPU provider for the
bitcode-lookup-and-attach.

* `KernelDispatch.cpp::setRootConfig(InnerTiledOp)`: when
`selectUKernel` returns a descriptor, set the reduction-dim vector tile
size to 0 (untiled) instead of 1 (unrolled). The ukernel's C function
takes the outer K extent as a runtime argument (`k_outer`) and runs the
K loop itself; pre-unrolling here would both defeat that and bloat the
IR. Matches the equivalent split in
`setDataTiledMmaInnerTiledLoweringConfig` on the GPU side.

* `Passes.cpp::addMmt4dTilingExpertPassPipeline`: insert
`createLowerBitcodeUKernelsPass()` between the parallel-tile and
reduction-tile passes. A nop when no op carries a `iree_codegen.ukernel`
descriptor, so it stays in the default pipeline. The companion
`LowerUKernelOpsToCalls` already runs after bufferization (in
`addLowerToLLVMPasses`); together they implement the user's "early
`inner_tiled` -> `ukernel.generic` on tensors; late `ukernel.generic` ->
`func.call` on memrefs" split.

Lit test (`select_ukernel.mlir`) gains a second RUN line that chains
`iree-llvmcpu-select-lowering-strategy` with
`iree-codegen-lower-bitcode-ukernels` and asserts:
- the `inner_tiled` is rewritten to `iree_codegen.ukernel.generic`
carrying the right `iree_uk_mma_x86_avx512bf16_1x16x2_f32_bf16` name;
- the matching bitcode appears as `hal.executable.objects` (resolved
from the global `EmbeddedDataDirectory` populated at LLVMCPU plugin
init);
- and the original `inner_tiled` is gone, guarding against the rewrite
silently no-op'ing on a regression.

An end-to-end `iree-compile` test would also be desirable, but the
current pipeline state needs more wiring (workgroup-distribution
verifier complains about the bufferization-introduced copy ops around
the workgroup loop, on both the ukernel and non-ukernel paths) — that
investigation belongs with the follow-up commit that fills in real
ukernel bodies and an actual numerical matmul test.

Progress towards https://github.com/iree-org/iree/issues/24574.

Signed-off-by: Benoit Jacob <jacob.benoit.1@gmail.com>
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
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README.md

IREE: Intermediate Representation Execution Environment

IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.

See our website for project details, user guides, and instructions on building from source.

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Releases notes are published on GitHub releases.

PackageRelease status
GitHub release (stable)GitHub Release
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iree-base-compilerPyPI version
iree-base-runtimePyPI version

For more details on the release process, see https://iree.dev/developers/general/release-management/.

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LinuxCI - Linux arm64 clang
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macOSCI - macOS arm64 clang

For the full list of workflows see https://iree.dev/developers/general/github-actions/.

Communication channels

Related project channels

  • MLIR topic within LLVM Discourse: IREE is enabled by and heavily relies on MLIR. IREE sometimes is referred to in certain MLIR discussions. Useful if you are also interested in MLIR evolution.

Architecture overview

IREE Architecture IREE Architecture

See our website for more information.

Presentations and talks

Community meeting recordings: IREE YouTube channel

DateTitleRecordingSlides
2025-06-10Data-Tiling in IREE: Achieving High Performance Through Compiler Design (AsiaLLVM)recordingslides
2025-05-17Introduction to GPU architecture and IREE's GPU CodeGen Pipelinerecordingslides
2025-02-12The Long Tail of AI: SPIR-V in IREE and MLIR (Vulkanised)recordingslides
2024-10-01Unveiling the Inner Workings of IREE: An MLIR-Based Compiler for Diverse Hardwarerecording
2021-06-09IREE Runtime Design Tech Talkrecordingslides
2020-08-20IREE CodeGen (MLIR Open Design Meeting)recordingslides
2020-03-18Interactive HAL IR Walkthroughrecording
2020-01-31End-to-end MLIR Workflow in IREE (MLIR Open Design Meeting)recordingslides

License

IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.