[Codegen] Add bufferization support for CastToRaggedShapeOp and LinearizeRaggedDimsOp (#24193) This is PR 4/N of landing block sparse changes that are captured in this branch : https://github.com/MaheshRavishankar/iree/tree/users/MaheshRavishankar/blockSparseCommits Adds `BufferizableOpInterfac`e external models for two tensor-ext ops that describe ragged shapes: - `iree_tensor_ext.cast_to_ragged_shape` — reinterprets a source buffer as a rank-(n+1) ragged buffer by attaching a RaggedShapeAttr as the memref layout. -`iree_tensor_ext.linearize_ragged_dims` — the inverse view: collapses the ragged dimensions of a source buffer back into a single dense dimension and drops the ragged layout. Both ops are pure views, so the interface implementations: - Report the operands as reads and never as writes (including `resultBufferizesToMemoryWrite = false`). - Set `mustBufferizeInPlace = true` and mark the result as `BufferRelation::Equivalent` to source, so bufferization does not introduce a copy. - For `cast_to_ragged_shape`, the result memref's layout is the ragged encoding promoted from the tensor encoding; operand buffers use the identity layout. - For `linearize_ragged_dims`, both operand and result memrefs use the identity layout; the result simply drops the ragged encoding. `bufferize` replaces the tensor-typed op with an identical memref-typed version of itself — no data is moved.
IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.
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iree-base-runtime |
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Community meeting recordings: IREE YouTube channel
| Date | Title | Recording | Slides |
|---|---|---|---|
| 2025-06-10 | Data-Tiling in IREE: Achieving High Performance Through Compiler Design (AsiaLLVM) | recording | slides |
| 2025-05-17 | Introduction to GPU architecture and IREE's GPU CodeGen Pipeline | recording | slides |
| 2025-02-12 | The Long Tail of AI: SPIR-V in IREE and MLIR (Vulkanised) | recording | slides |
| 2024-10-01 | Unveiling the Inner Workings of IREE: An MLIR-Based Compiler for Diverse Hardware | recording | |
| 2021-06-09 | IREE Runtime Design Tech Talk | recording | slides |
| 2020-08-20 | IREE CodeGen (MLIR Open Design Meeting) | recording | slides |
| 2020-03-18 | Interactive HAL IR Walkthrough | recording | |
| 2020-01-31 | End-to-end MLIR Workflow in IREE (MLIR Open Design Meeting) | recording | slides |
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