Adding runtime VM support for the f32 extension.
diff --git a/iree/base/config.h b/iree/base/config.h index 935f0f2..0d01925 100644 --- a/iree/base/config.h +++ b/iree/base/config.h
@@ -121,7 +121,7 @@ #if !defined(IREE_VM_EXT_F32_ENABLE) // Enables the 32-bit floating-point instruction extension. // Targeted from the compiler with `-iree-vm-target-extensions=f32`. -#define IREE_VM_EXT_F32_ENABLE 0 +#define IREE_VM_EXT_F32_ENABLE 1 #endif // !IREE_VM_EXT_F32_ENABLE #if !defined(IREE_VM_EXT_F64_ENABLE)
diff --git a/iree/vm/bytecode_dispatch.c b/iree/vm/bytecode_dispatch.c index 9f9f625..8d600cb 100644 --- a/iree/vm/bytecode_dispatch.c +++ b/iree/vm/bytecode_dispatch.c
@@ -202,13 +202,15 @@ switch (cconv_arguments.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: { uint16_t dst_reg = i32_reg++; memcpy(&callee_registers.i32[dst_reg & callee_registers.i32_mask], p, sizeof(int32_t)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: { uint16_t dst_reg = i32_reg; i32_reg += 2; memcpy(&callee_registers.i32[dst_reg & callee_registers.i32_mask], p, @@ -245,12 +247,14 @@ switch (cconv_results.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: { memcpy(p, &callee_registers->i32[src_reg & callee_registers->i32_mask], sizeof(int32_t)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: { memcpy( p, &callee_registers->i32[src_reg & (callee_registers->i32_mask & ~1)], @@ -386,14 +390,16 @@ switch (cconv_arguments.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: { memcpy(p, &caller_registers.i32[src_reg_list->registers[reg_i++] & caller_registers.i32_mask], sizeof(int32_t)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: { memcpy(p, &caller_registers.i32[src_reg_list->registers[reg_i++] & (caller_registers.i32_mask & ~1)], @@ -430,14 +436,16 @@ switch (cconv_arguments.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: { memcpy(p, &caller_registers.i32[src_reg_list->registers[reg_i++] & caller_registers.i32_mask], sizeof(int32_t)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: { memcpy(p, &caller_registers.i32[src_reg_list->registers[reg_i++] & (caller_registers.i32_mask & ~1)], @@ -492,12 +500,14 @@ switch (cconv_results.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: memcpy(&caller_registers.i32[dst_reg & caller_registers.i32_mask], p, sizeof(int32_t)); p += sizeof(int32_t); break; - case IREE_VM_CCONV_TYPE_INT64: + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: memcpy( &caller_registers.i32[dst_reg & (caller_registers.i32_mask & ~1)], p, sizeof(int64_t)); @@ -1470,8 +1480,188 @@ } END_DISPATCH_PREFIX(); - DISPATCH_OP(CORE, PrefixExtF32, - { return iree_make_status(IREE_STATUS_UNIMPLEMENTED); }); + BEGIN_DISPATCH_PREFIX(PrefixExtF32, EXT_F32) { +#if IREE_VM_EXT_F32_ENABLE + //===----------------------------------------------------------------===// + // ExtF32: Globals + //===----------------------------------------------------------------===// + + DISPATCH_OP(EXT_F32, GlobalLoadF32, { + uint32_t byte_offset = VM_DecGlobalAttr("global"); + if (IREE_UNLIKELY(byte_offset >= + module_state->rwdata_storage.data_length)) { + return iree_make_status( + IREE_STATUS_OUT_OF_RANGE, + "global byte_offset out of range: %d (rwdata=%zu)", byte_offset, + module_state->rwdata_storage.data_length); + } + float* value = VM_DecResultRegF32("value"); + const float* global_ptr = + (const float*)(module_state->rwdata_storage.data + byte_offset); + *value = *global_ptr; + }); + + DISPATCH_OP(EXT_F32, GlobalStoreF32, { + uint32_t byte_offset = VM_DecGlobalAttr("global"); + if (IREE_UNLIKELY(byte_offset >= + module_state->rwdata_storage.data_length)) { + return iree_make_status( + IREE_STATUS_OUT_OF_RANGE, + "global byte_offset out of range: %d (rwdata=%zu)", byte_offset, + module_state->rwdata_storage.data_length); + } + float value = VM_DecOperandRegF32("value"); + float* global_ptr = + (float*)(module_state->rwdata_storage.data + byte_offset); + *global_ptr = value; + }); + + DISPATCH_OP(EXT_F32, GlobalLoadIndirectF32, { + uint32_t byte_offset = VM_DecOperandRegI32("global"); + if (IREE_UNLIKELY(byte_offset >= + module_state->rwdata_storage.data_length)) { + return iree_make_status( + IREE_STATUS_OUT_OF_RANGE, + "global byte_offset out of range: %d (rwdata=%zu)", byte_offset, + module_state->rwdata_storage.data_length); + } + float* value = VM_DecResultRegF32("value"); + const float* global_ptr = + (const float*)(module_state->rwdata_storage.data + byte_offset); + *value = *global_ptr; + }); + + DISPATCH_OP(EXT_F32, GlobalStoreIndirectF32, { + uint32_t byte_offset = VM_DecOperandRegI32("global"); + if (IREE_UNLIKELY(byte_offset >= + module_state->rwdata_storage.data_length)) { + return iree_make_status( + IREE_STATUS_OUT_OF_RANGE, + "global byte_offset out of range: %d (rwdata=%zu)", byte_offset, + module_state->rwdata_storage.data_length); + } + float value = VM_DecOperandRegF32("value"); + float* global_ptr = + (float*)(module_state->rwdata_storage.data + byte_offset); + *global_ptr = value; + }); + + //===----------------------------------------------------------------===// + // ExtF32: Constants + //===----------------------------------------------------------------===// + + DISPATCH_OP(EXT_F32, ConstF32, { + float value = VM_DecFloatAttr32("value"); + float* result = VM_DecResultRegF32("result"); + *result = value; + }); + + DISPATCH_OP(EXT_F32, ConstF32Zero, { + float* result = VM_DecResultRegF32("result"); + *result = 0; + }); + + //===----------------------------------------------------------------===// + // ExtF32: Lists + //===----------------------------------------------------------------===// + + DISPATCH_OP(EXT_F32, ListGetF32, { + bool list_is_move; + iree_vm_ref_t* list_ref = VM_DecOperandRegRef("list", &list_is_move); + iree_vm_list_t* list = iree_vm_list_deref(*list_ref); + if (IREE_UNLIKELY(!list)) { + return iree_make_status(IREE_STATUS_INVALID_ARGUMENT, "list is null"); + } + uint32_t index = VM_DecOperandRegI32("index"); + float* result = VM_DecResultRegF32("result"); + iree_vm_value_t value; + IREE_RETURN_IF_ERROR(iree_vm_list_get_value_as( + list, index, IREE_VM_VALUE_TYPE_F32, &value)); + *result = value.f32; + }); + + DISPATCH_OP(EXT_F32, ListSetF32, { + bool list_is_move; + iree_vm_ref_t* list_ref = VM_DecOperandRegRef("list", &list_is_move); + iree_vm_list_t* list = iree_vm_list_deref(*list_ref); + if (IREE_UNLIKELY(!list)) { + return iree_make_status(IREE_STATUS_INVALID_ARGUMENT, "list is null"); + } + uint32_t index = VM_DecOperandRegI32("index"); + float raw_value = VM_DecOperandRegF32("value"); + iree_vm_value_t value = iree_vm_value_make_f32(raw_value); + IREE_RETURN_IF_ERROR(iree_vm_list_set_value(list, index, &value)); + }); + + //===----------------------------------------------------------------===// + // ExtF32: Conditional assignment + //===----------------------------------------------------------------===// + + DISPATCH_OP(EXT_F32, SelectF32, { + int32_t condition = VM_DecOperandRegI32("condition"); + float true_value = VM_DecOperandRegF32("true_value"); + float false_value = VM_DecOperandRegF32("false_value"); + float* result = VM_DecResultRegF32("result"); + *result = vm_select_f32(condition, true_value, false_value); + }); + + DISPATCH_OP(EXT_F32, SwitchF32, { + int32_t index = VM_DecOperandRegI32("index"); + float default_value = VM_DecFloatAttr32("default_value"); + const iree_vm_register_list_t* value_reg_list = + VM_DecVariadicOperands("values"); + float* result = VM_DecResultRegF32("result"); + if (index >= 0 && index < value_reg_list->size) { + *result = *((float*)®s.i32[value_reg_list->registers[index] & + (regs.i32_mask & ~1)]); + } else { + *result = default_value; + } + }); + + //===----------------------------------------------------------------===// + // ExtF32: Native floating-point arithmetic + //===----------------------------------------------------------------===// + + DISPATCH_OP_EXT_F32_BINARY_F32(AddF32, vm_add_f32); + DISPATCH_OP_EXT_F32_BINARY_F32(SubF32, vm_sub_f32); + DISPATCH_OP_EXT_F32_BINARY_F32(MulF32, vm_mul_f32); + DISPATCH_OP_EXT_F32_BINARY_F32(DivF32, vm_div_f32); + DISPATCH_OP_EXT_F32_BINARY_F32(RemF32, vm_rem_f32); + DISPATCH_OP_EXT_F32_UNARY_F32(AbsF32, vm_abs_f32); + DISPATCH_OP_EXT_F32_UNARY_F32(NegF32, vm_neg_f32); + DISPATCH_OP_EXT_F32_UNARY_F32(CeilF32, vm_ceil_f32); + DISPATCH_OP_EXT_F32_UNARY_F32(FloorF32, vm_floor_f32); + + //===----------------------------------------------------------------===// + // ExtF32: Casting and type conversion/emulation + //===----------------------------------------------------------------===// + + //===----------------------------------------------------------------===// + // ExtF32: Comparison ops + //===----------------------------------------------------------------===// + +#define DISPATCH_OP_EXT_F32_CMP_F32(op_name, op_func) \ + DISPATCH_OP(EXT_F32, op_name, { \ + float lhs = VM_DecOperandRegF32("lhs"); \ + float rhs = VM_DecOperandRegF32("rhs"); \ + int32_t* result = VM_DecResultRegI32("result"); \ + *result = op_func(lhs, rhs); \ + }); + + DISPATCH_OP_EXT_F32_CMP_F32(CmpEQF32, vm_cmp_eq_f32); + DISPATCH_OP_EXT_F32_CMP_F32(CmpNEF32, vm_cmp_ne_f32); + DISPATCH_OP_EXT_F32_CMP_F32(CmpLTF32, vm_cmp_lt_f32); + DISPATCH_OP(EXT_F32, CmpNZF32, { + float operand = VM_DecOperandRegF32("operand"); + int32_t* result = VM_DecResultRegI32("result"); + *result = vm_cmp_nz_f32(operand); + }); +#else + return iree_make_status(IREE_STATUS_UNIMPLEMENTED); +#endif // IREE_VM_EXT_F32_ENABLE + } + END_DISPATCH_PREFIX(); DISPATCH_OP(CORE, PrefixExtF64, { return iree_make_status(IREE_STATUS_UNIMPLEMENTED); });
diff --git a/iree/vm/bytecode_dispatch_util.h b/iree/vm/bytecode_dispatch_util.h index 0d96adf..fec5645 100644 --- a/iree/vm/bytecode_dispatch_util.h +++ b/iree/vm/bytecode_dispatch_util.h
@@ -166,6 +166,8 @@ #define OP_I16(i) *((uint16_t*)&bytecode_data[pc + (i)]) #define OP_I32(i) *((uint32_t*)&bytecode_data[pc + (i)]) #define OP_I64(i) *((uint64_t*)&bytecode_data[pc + (i)]) +#define OP_F32(i) *((float*)&bytecode_data[pc + (i)]) +#define OP_F64(i) *((double*)&bytecode_data[pc + (i)]) #else #define OP_I8(i) bytecode_data[pc + (i)] #define OP_I16(i) \ @@ -185,6 +187,7 @@ ((uint64_t)bytecode_data[pc + 5 + (i)] << 40) | \ ((uint64_t)bytecode_data[pc + 6 + (i)] << 48) | \ ((uint64_t)bytecode_data[pc + 7 + (i)] << 56) +#error "TODO: OP_F32 and OP_F64 for big endian systems" #endif // IREE_ENDIANNESS_LITTLE //===----------------------------------------------------------------------===// @@ -205,6 +208,12 @@ #define VM_DecConstI64(name) \ OP_I64(0); \ pc += 8; +#define VM_DecConstF32(name) \ + OP_F32(0); \ + pc += 4; +#define VM_DecConstF64(name) \ + OP_F64(0); \ + pc += 8; #define VM_DecOpcode(opcode) VM_DecConstI8(#opcode) #define VM_DecFuncAttr(name) VM_DecConstI32(name) #define VM_DecGlobalAttr(name) VM_DecConstI32(name) @@ -215,6 +224,8 @@ #define VM_DecTypeOf(name) VM_DecType(name) #define VM_DecIntAttr32(name) VM_DecConstI32(name) #define VM_DecIntAttr64(name) VM_DecConstI64(name) +#define VM_DecFloatAttr32(name) VM_DecConstF32(name) +#define VM_DecFloatAttr64(name) VM_DecConstF64(name) #define VM_DecStrAttr(name, out_str) \ (out_str)->size = (iree_host_size_t)OP_I16(0); \ (out_str)->data = (const char*)&bytecode_data[pc + 2]; \ @@ -231,6 +242,12 @@ #define VM_DecOperandRegI64(name) \ *((int64_t*)®s.i32[OP_I16(0) & (regs.i32_mask & ~1)]); \ pc += kRegSize; +#define VM_DecOperandRegF32(name) \ + *((float*)®s.i32[OP_I16(0) & regs.i32_mask]); \ + pc += kRegSize; +#define VM_DecOperandRegF64(name) \ + *((double*)®s.i32[OP_I16(0) & (regs.i32_mask & ~1)]); \ + pc += kRegSize; #define VM_DecOperandRegRef(name, out_is_move) \ ®s.ref[OP_I16(0) & regs.ref_mask]; \ *(out_is_move) = OP_I16(0) & IREE_REF_REGISTER_MOVE_BIT; \ @@ -245,6 +262,12 @@ #define VM_DecResultRegI64(name) \ ((int64_t*)®s.i32[OP_I16(0) & (regs.i32_mask & ~1)]); \ pc += kRegSize; +#define VM_DecResultRegF32(name) \ + ((float*)®s.i32[OP_I16(0) & regs.i32_mask]); \ + pc += kRegSize; +#define VM_DecResultRegF64(name) \ + ((double*)®s.i32[OP_I16(0) & (regs.i32_mask & ~1)]); \ + pc += kRegSize; #define VM_DecResultRegRef(name, out_is_move) \ ®s.ref[OP_I16(0) & regs.ref_mask]; \ *(out_is_move) = OP_I16(0) & IREE_REF_REGISTER_MOVE_BIT; \ @@ -294,10 +317,28 @@ #else #define DEFINE_DISPATCH_TABLE_EXT_I64() #endif // IREE_VM_EXT_I64_ENABLE +#if IREE_VM_EXT_F32_ENABLE +#define DECLARE_DISPATCH_EXT_F32_OPC(ordinal, name) &&_dispatch_EXT_F32_##name, +#define DEFINE_DISPATCH_TABLE_EXT_F32() \ + static const void* kDispatchTable_EXT_F32[256] = {IREE_VM_OP_EXT_F32_TABLE( \ + DECLARE_DISPATCH_EXT_F32_OPC, DECLARE_DISPATCH_EXT_RSV)}; +#else +#define DEFINE_DISPATCH_TABLE_EXT_F32() +#endif // IREE_VM_EXT_I64_ENABLE +#if IREE_VM_EXT_F64_ENABLE +#define DECLARE_DISPATCH_EXT_F64_OPC(ordinal, name) &&_dispatch_EXT_F64_##name, +#define DEFINE_DISPATCH_TABLE_EXT_F64() \ + static const void* kDispatchTable_EXT_F64[256] = {IREE_VM_OP_EXT_F64_TABLE( \ + DECLARE_DISPATCH_EXT_F64_OPC, DECLARE_DISPATCH_EXT_RSV)}; +#else +#define DEFINE_DISPATCH_TABLE_EXT_F64() +#endif // IREE_VM_EXT_I64_ENABLE -#define DEFINE_DISPATCH_TABLES() \ - DEFINE_DISPATCH_TABLE_CORE(); \ - DEFINE_DISPATCH_TABLE_EXT_I64(); +#define DEFINE_DISPATCH_TABLES() \ + DEFINE_DISPATCH_TABLE_CORE(); \ + DEFINE_DISPATCH_TABLE_EXT_I64(); \ + DEFINE_DISPATCH_TABLE_EXT_F32(); \ + DEFINE_DISPATCH_TABLE_EXT_F64(); #define DISPATCH_UNHANDLED_CORE() \ _dispatch_unhandled : { \ @@ -388,4 +429,34 @@ *result = op_func(lhs, rhs); \ }); +#define DISPATCH_OP_EXT_F32_UNARY_F32(op_name, op_func) \ + DISPATCH_OP(EXT_F32, op_name, { \ + float operand = VM_DecOperandRegF32("operand"); \ + float* result = VM_DecResultRegF32("result"); \ + *result = op_func(operand); \ + }); + +#define DISPATCH_OP_EXT_F32_BINARY_F32(op_name, op_func) \ + DISPATCH_OP(EXT_F32, op_name, { \ + float lhs = VM_DecOperandRegF32("lhs"); \ + float rhs = VM_DecOperandRegF32("rhs"); \ + float* result = VM_DecResultRegF32("result"); \ + *result = op_func(lhs, rhs); \ + }); + +#define DISPATCH_OP_EXT_F64_UNARY_F64(op_name, op_func) \ + DISPATCH_OP(EXT_F64, op_name, { \ + double operand = VM_DecOperandRegF64("operand"); \ + double* result = VM_DecResultRegF64("result"); \ + *result = op_func(operand); \ + }); + +#define DISPATCH_OP_EXT_F64_BINARY_F64(op_name, op_func) \ + DISPATCH_OP(EXT_F64, op_name, { \ + double lhs = VM_DecOperandRegF64("lhs"); \ + double rhs = VM_DecOperandRegF64("rhs"); \ + double* result = VM_DecResultRegF64("result"); \ + *result = op_func(lhs, rhs); \ + }); + #endif // IREE_VM_BYTECODE_DISPATCH_UTIL_H_
diff --git a/iree/vm/bytecode_module.c b/iree/vm/bytecode_module.c index 23e7184..4511e49 100644 --- a/iree/vm/bytecode_module.c +++ b/iree/vm/bytecode_module.c
@@ -51,6 +51,14 @@ iree_make_cstring_view("i64")) == 0) { out_type->value_type = IREE_VM_VALUE_TYPE_I64; return true; + } else if (iree_vm_flatbuffer_strcmp(full_name, + iree_make_cstring_view("f32")) == 0) { + out_type->value_type = IREE_VM_VALUE_TYPE_F32; + return true; + } else if (iree_vm_flatbuffer_strcmp(full_name, + iree_make_cstring_view("f64")) == 0) { + out_type->value_type = IREE_VM_VALUE_TYPE_F64; + return true; } else if (iree_vm_flatbuffer_strcmp( full_name, iree_make_cstring_view("!vm.opaque")) == 0) { out_type->value_type = IREE_VM_VALUE_TYPE_NONE;
diff --git a/iree/vm/generated/bytecode_op_table.h b/iree/vm/generated/bytecode_op_table.h index b63eb6c..8028a35 100644 --- a/iree/vm/generated/bytecode_op_table.h +++ b/iree/vm/generated/bytecode_op_table.h
@@ -524,6 +524,1040 @@ RSV(0xFF) typedef enum { + IREE_VM_OP_EXT_F32_GlobalLoadF32 = 0x00, + IREE_VM_OP_EXT_F32_GlobalStoreF32 = 0x01, + IREE_VM_OP_EXT_F32_GlobalLoadIndirectF32 = 0x02, + IREE_VM_OP_EXT_F32_GlobalStoreIndirectF32 = 0x03, + IREE_VM_OP_EXT_F32_RSV_0x04, + IREE_VM_OP_EXT_F32_RSV_0x05, + IREE_VM_OP_EXT_F32_RSV_0x06, + IREE_VM_OP_EXT_F32_RSV_0x07, + IREE_VM_OP_EXT_F32_ConstF32Zero = 0x08, + IREE_VM_OP_EXT_F32_ConstF32 = 0x09, + IREE_VM_OP_EXT_F32_RSV_0x0A, + IREE_VM_OP_EXT_F32_RSV_0x0B, + IREE_VM_OP_EXT_F32_RSV_0x0C, + IREE_VM_OP_EXT_F32_RSV_0x0D, + IREE_VM_OP_EXT_F32_RSV_0x0E, + IREE_VM_OP_EXT_F32_RSV_0x0F, + IREE_VM_OP_EXT_F32_RSV_0x10, + IREE_VM_OP_EXT_F32_RSV_0x11, + IREE_VM_OP_EXT_F32_RSV_0x12, + IREE_VM_OP_EXT_F32_RSV_0x13, + IREE_VM_OP_EXT_F32_ListGetF32 = 0x14, + IREE_VM_OP_EXT_F32_ListSetF32 = 0x15, + IREE_VM_OP_EXT_F32_RSV_0x16, + IREE_VM_OP_EXT_F32_RSV_0x17, + IREE_VM_OP_EXT_F32_RSV_0x18, + IREE_VM_OP_EXT_F32_RSV_0x19, + IREE_VM_OP_EXT_F32_RSV_0x1A, + IREE_VM_OP_EXT_F32_RSV_0x1B, + IREE_VM_OP_EXT_F32_RSV_0x1C, + IREE_VM_OP_EXT_F32_RSV_0x1D, + IREE_VM_OP_EXT_F32_SelectF32 = 0x1E, + IREE_VM_OP_EXT_F32_RSV_0x1F, + IREE_VM_OP_EXT_F32_SwitchF32 = 0x20, + IREE_VM_OP_EXT_F32_RSV_0x21, + IREE_VM_OP_EXT_F32_AddF32 = 0x22, + IREE_VM_OP_EXT_F32_SubF32 = 0x23, + IREE_VM_OP_EXT_F32_MulF32 = 0x24, + IREE_VM_OP_EXT_F32_DivF32 = 0x25, + IREE_VM_OP_EXT_F32_RSV_0x26, + IREE_VM_OP_EXT_F32_RemF32 = 0x27, + IREE_VM_OP_EXT_F32_RSV_0x28, + IREE_VM_OP_EXT_F32_RSV_0x29, + IREE_VM_OP_EXT_F32_RSV_0x2A, + IREE_VM_OP_EXT_F32_RSV_0x2B, + IREE_VM_OP_EXT_F32_RSV_0x2C, + IREE_VM_OP_EXT_F32_AbsF32 = 0x2D, + IREE_VM_OP_EXT_F32_NegF32 = 0x2E, + IREE_VM_OP_EXT_F32_CeilF32 = 0x2F, + IREE_VM_OP_EXT_F32_RSV_0x30, + IREE_VM_OP_EXT_F32_RSV_0x31, + IREE_VM_OP_EXT_F32_FloorF32 = 0x32, + IREE_VM_OP_EXT_F32_RSV_0x33, + IREE_VM_OP_EXT_F32_RSV_0x34, + IREE_VM_OP_EXT_F32_RSV_0x35, + IREE_VM_OP_EXT_F32_RSV_0x36, + IREE_VM_OP_EXT_F32_RSV_0x37, + IREE_VM_OP_EXT_F32_RSV_0x38, + IREE_VM_OP_EXT_F32_RSV_0x39, + IREE_VM_OP_EXT_F32_RSV_0x3A, + IREE_VM_OP_EXT_F32_RSV_0x3B, + IREE_VM_OP_EXT_F32_RSV_0x3C, + IREE_VM_OP_EXT_F32_RSV_0x3D, + IREE_VM_OP_EXT_F32_RSV_0x3E, + IREE_VM_OP_EXT_F32_RSV_0x3F, + IREE_VM_OP_EXT_F32_CmpEQF32 = 0x40, + IREE_VM_OP_EXT_F32_CmpNEF32 = 0x41, + IREE_VM_OP_EXT_F32_CmpNZF32 = 0x42, + IREE_VM_OP_EXT_F32_CmpLTF32 = 0x43, + IREE_VM_OP_EXT_F32_RSV_0x44, + IREE_VM_OP_EXT_F32_RSV_0x45, + IREE_VM_OP_EXT_F32_RSV_0x46, + IREE_VM_OP_EXT_F32_RSV_0x47, + IREE_VM_OP_EXT_F32_RSV_0x48, + IREE_VM_OP_EXT_F32_RSV_0x49, + IREE_VM_OP_EXT_F32_RSV_0x4A, + IREE_VM_OP_EXT_F32_RSV_0x4B, + IREE_VM_OP_EXT_F32_RSV_0x4C, + IREE_VM_OP_EXT_F32_RSV_0x4D, + IREE_VM_OP_EXT_F32_RSV_0x4E, + IREE_VM_OP_EXT_F32_RSV_0x4F, + IREE_VM_OP_EXT_F32_RSV_0x50, + IREE_VM_OP_EXT_F32_RSV_0x51, + IREE_VM_OP_EXT_F32_RSV_0x52, + IREE_VM_OP_EXT_F32_RSV_0x53, + IREE_VM_OP_EXT_F32_RSV_0x54, + IREE_VM_OP_EXT_F32_RSV_0x55, + IREE_VM_OP_EXT_F32_RSV_0x56, + IREE_VM_OP_EXT_F32_RSV_0x57, + IREE_VM_OP_EXT_F32_RSV_0x58, + IREE_VM_OP_EXT_F32_RSV_0x59, + IREE_VM_OP_EXT_F32_RSV_0x5A, + IREE_VM_OP_EXT_F32_RSV_0x5B, + IREE_VM_OP_EXT_F32_RSV_0x5C, + IREE_VM_OP_EXT_F32_RSV_0x5D, + IREE_VM_OP_EXT_F32_RSV_0x5E, + IREE_VM_OP_EXT_F32_RSV_0x5F, + IREE_VM_OP_EXT_F32_RSV_0x60, + IREE_VM_OP_EXT_F32_RSV_0x61, + IREE_VM_OP_EXT_F32_RSV_0x62, + IREE_VM_OP_EXT_F32_RSV_0x63, + IREE_VM_OP_EXT_F32_RSV_0x64, + IREE_VM_OP_EXT_F32_RSV_0x65, + IREE_VM_OP_EXT_F32_RSV_0x66, + IREE_VM_OP_EXT_F32_RSV_0x67, + IREE_VM_OP_EXT_F32_RSV_0x68, + IREE_VM_OP_EXT_F32_RSV_0x69, + IREE_VM_OP_EXT_F32_RSV_0x6A, + IREE_VM_OP_EXT_F32_RSV_0x6B, + IREE_VM_OP_EXT_F32_RSV_0x6C, + IREE_VM_OP_EXT_F32_RSV_0x6D, + IREE_VM_OP_EXT_F32_RSV_0x6E, + IREE_VM_OP_EXT_F32_RSV_0x6F, + IREE_VM_OP_EXT_F32_RSV_0x70, + IREE_VM_OP_EXT_F32_RSV_0x71, + IREE_VM_OP_EXT_F32_RSV_0x72, + IREE_VM_OP_EXT_F32_RSV_0x73, + IREE_VM_OP_EXT_F32_RSV_0x74, + IREE_VM_OP_EXT_F32_RSV_0x75, + IREE_VM_OP_EXT_F32_RSV_0x76, + IREE_VM_OP_EXT_F32_RSV_0x77, + IREE_VM_OP_EXT_F32_RSV_0x78, + IREE_VM_OP_EXT_F32_RSV_0x79, + IREE_VM_OP_EXT_F32_RSV_0x7A, + IREE_VM_OP_EXT_F32_RSV_0x7B, + IREE_VM_OP_EXT_F32_RSV_0x7C, + IREE_VM_OP_EXT_F32_RSV_0x7D, + IREE_VM_OP_EXT_F32_RSV_0x7E, + IREE_VM_OP_EXT_F32_RSV_0x7F, + IREE_VM_OP_EXT_F32_RSV_0x80, + IREE_VM_OP_EXT_F32_RSV_0x81, + IREE_VM_OP_EXT_F32_RSV_0x82, + IREE_VM_OP_EXT_F32_RSV_0x83, + IREE_VM_OP_EXT_F32_RSV_0x84, + IREE_VM_OP_EXT_F32_RSV_0x85, + IREE_VM_OP_EXT_F32_RSV_0x86, + IREE_VM_OP_EXT_F32_RSV_0x87, + IREE_VM_OP_EXT_F32_RSV_0x88, + IREE_VM_OP_EXT_F32_RSV_0x89, + IREE_VM_OP_EXT_F32_RSV_0x8A, + IREE_VM_OP_EXT_F32_RSV_0x8B, + IREE_VM_OP_EXT_F32_RSV_0x8C, + IREE_VM_OP_EXT_F32_RSV_0x8D, + IREE_VM_OP_EXT_F32_RSV_0x8E, + IREE_VM_OP_EXT_F32_RSV_0x8F, + IREE_VM_OP_EXT_F32_RSV_0x90, + IREE_VM_OP_EXT_F32_RSV_0x91, + IREE_VM_OP_EXT_F32_RSV_0x92, + IREE_VM_OP_EXT_F32_RSV_0x93, + IREE_VM_OP_EXT_F32_RSV_0x94, + IREE_VM_OP_EXT_F32_RSV_0x95, + IREE_VM_OP_EXT_F32_RSV_0x96, + IREE_VM_OP_EXT_F32_RSV_0x97, + IREE_VM_OP_EXT_F32_RSV_0x98, + IREE_VM_OP_EXT_F32_RSV_0x99, + IREE_VM_OP_EXT_F32_RSV_0x9A, + IREE_VM_OP_EXT_F32_RSV_0x9B, + IREE_VM_OP_EXT_F32_RSV_0x9C, + IREE_VM_OP_EXT_F32_RSV_0x9D, + IREE_VM_OP_EXT_F32_RSV_0x9E, + IREE_VM_OP_EXT_F32_RSV_0x9F, + IREE_VM_OP_EXT_F32_RSV_0xA0, + IREE_VM_OP_EXT_F32_RSV_0xA1, + IREE_VM_OP_EXT_F32_RSV_0xA2, + IREE_VM_OP_EXT_F32_RSV_0xA3, + IREE_VM_OP_EXT_F32_RSV_0xA4, + IREE_VM_OP_EXT_F32_RSV_0xA5, + IREE_VM_OP_EXT_F32_RSV_0xA6, + IREE_VM_OP_EXT_F32_RSV_0xA7, + IREE_VM_OP_EXT_F32_RSV_0xA8, + IREE_VM_OP_EXT_F32_RSV_0xA9, + IREE_VM_OP_EXT_F32_RSV_0xAA, + IREE_VM_OP_EXT_F32_RSV_0xAB, + IREE_VM_OP_EXT_F32_RSV_0xAC, + IREE_VM_OP_EXT_F32_RSV_0xAD, + IREE_VM_OP_EXT_F32_RSV_0xAE, + IREE_VM_OP_EXT_F32_RSV_0xAF, + IREE_VM_OP_EXT_F32_RSV_0xB0, + IREE_VM_OP_EXT_F32_RSV_0xB1, + IREE_VM_OP_EXT_F32_RSV_0xB2, + IREE_VM_OP_EXT_F32_RSV_0xB3, + IREE_VM_OP_EXT_F32_RSV_0xB4, + IREE_VM_OP_EXT_F32_RSV_0xB5, + IREE_VM_OP_EXT_F32_RSV_0xB6, + IREE_VM_OP_EXT_F32_RSV_0xB7, + IREE_VM_OP_EXT_F32_RSV_0xB8, + IREE_VM_OP_EXT_F32_RSV_0xB9, + IREE_VM_OP_EXT_F32_RSV_0xBA, + IREE_VM_OP_EXT_F32_RSV_0xBB, + IREE_VM_OP_EXT_F32_RSV_0xBC, + IREE_VM_OP_EXT_F32_RSV_0xBD, + IREE_VM_OP_EXT_F32_RSV_0xBE, + IREE_VM_OP_EXT_F32_RSV_0xBF, + IREE_VM_OP_EXT_F32_RSV_0xC0, + IREE_VM_OP_EXT_F32_RSV_0xC1, + IREE_VM_OP_EXT_F32_RSV_0xC2, + IREE_VM_OP_EXT_F32_RSV_0xC3, + IREE_VM_OP_EXT_F32_RSV_0xC4, + IREE_VM_OP_EXT_F32_RSV_0xC5, + IREE_VM_OP_EXT_F32_RSV_0xC6, + IREE_VM_OP_EXT_F32_RSV_0xC7, + IREE_VM_OP_EXT_F32_RSV_0xC8, + IREE_VM_OP_EXT_F32_RSV_0xC9, + IREE_VM_OP_EXT_F32_RSV_0xCA, + IREE_VM_OP_EXT_F32_RSV_0xCB, + IREE_VM_OP_EXT_F32_RSV_0xCC, + IREE_VM_OP_EXT_F32_RSV_0xCD, + IREE_VM_OP_EXT_F32_RSV_0xCE, + IREE_VM_OP_EXT_F32_RSV_0xCF, + IREE_VM_OP_EXT_F32_RSV_0xD0, + IREE_VM_OP_EXT_F32_RSV_0xD1, + IREE_VM_OP_EXT_F32_RSV_0xD2, + IREE_VM_OP_EXT_F32_RSV_0xD3, + IREE_VM_OP_EXT_F32_RSV_0xD4, + IREE_VM_OP_EXT_F32_RSV_0xD5, + IREE_VM_OP_EXT_F32_RSV_0xD6, + IREE_VM_OP_EXT_F32_RSV_0xD7, + IREE_VM_OP_EXT_F32_RSV_0xD8, + IREE_VM_OP_EXT_F32_RSV_0xD9, + IREE_VM_OP_EXT_F32_RSV_0xDA, + IREE_VM_OP_EXT_F32_RSV_0xDB, + IREE_VM_OP_EXT_F32_RSV_0xDC, + IREE_VM_OP_EXT_F32_RSV_0xDD, + IREE_VM_OP_EXT_F32_RSV_0xDE, + IREE_VM_OP_EXT_F32_RSV_0xDF, + IREE_VM_OP_EXT_F32_RSV_0xE0, + IREE_VM_OP_EXT_F32_RSV_0xE1, + IREE_VM_OP_EXT_F32_RSV_0xE2, + IREE_VM_OP_EXT_F32_RSV_0xE3, + IREE_VM_OP_EXT_F32_RSV_0xE4, + IREE_VM_OP_EXT_F32_RSV_0xE5, + IREE_VM_OP_EXT_F32_RSV_0xE6, + IREE_VM_OP_EXT_F32_RSV_0xE7, + IREE_VM_OP_EXT_F32_RSV_0xE8, + IREE_VM_OP_EXT_F32_RSV_0xE9, + IREE_VM_OP_EXT_F32_RSV_0xEA, + IREE_VM_OP_EXT_F32_RSV_0xEB, + IREE_VM_OP_EXT_F32_RSV_0xEC, + IREE_VM_OP_EXT_F32_RSV_0xED, + IREE_VM_OP_EXT_F32_RSV_0xEE, + IREE_VM_OP_EXT_F32_RSV_0xEF, + IREE_VM_OP_EXT_F32_RSV_0xF0, + IREE_VM_OP_EXT_F32_RSV_0xF1, + IREE_VM_OP_EXT_F32_RSV_0xF2, + IREE_VM_OP_EXT_F32_RSV_0xF3, + IREE_VM_OP_EXT_F32_RSV_0xF4, + IREE_VM_OP_EXT_F32_RSV_0xF5, + IREE_VM_OP_EXT_F32_RSV_0xF6, + IREE_VM_OP_EXT_F32_RSV_0xF7, + IREE_VM_OP_EXT_F32_RSV_0xF8, + IREE_VM_OP_EXT_F32_RSV_0xF9, + IREE_VM_OP_EXT_F32_RSV_0xFA, + IREE_VM_OP_EXT_F32_RSV_0xFB, + IREE_VM_OP_EXT_F32_RSV_0xFC, + IREE_VM_OP_EXT_F32_RSV_0xFD, + IREE_VM_OP_EXT_F32_RSV_0xFE, + IREE_VM_OP_EXT_F32_RSV_0xFF, +} iree_vm_ext_f32_op_t; + +#define IREE_VM_OP_EXT_F32_TABLE(OPC, RSV) \ + OPC(0x00, GlobalLoadF32) \ + OPC(0x01, GlobalStoreF32) \ + OPC(0x02, GlobalLoadIndirectF32) \ + OPC(0x03, GlobalStoreIndirectF32) \ + RSV(0x04) \ + RSV(0x05) \ + RSV(0x06) \ + RSV(0x07) \ + OPC(0x08, ConstF32Zero) \ + OPC(0x09, ConstF32) \ + RSV(0x0A) \ + RSV(0x0B) \ + RSV(0x0C) \ + RSV(0x0D) \ + RSV(0x0E) \ + RSV(0x0F) \ + RSV(0x10) \ + RSV(0x11) \ + RSV(0x12) \ + RSV(0x13) \ + OPC(0x14, ListGetF32) \ + OPC(0x15, ListSetF32) \ + RSV(0x16) \ + RSV(0x17) \ + RSV(0x18) \ + RSV(0x19) \ + RSV(0x1A) \ + RSV(0x1B) \ + RSV(0x1C) \ + RSV(0x1D) \ + OPC(0x1E, SelectF32) \ + RSV(0x1F) \ + OPC(0x20, SwitchF32) \ + RSV(0x21) \ + OPC(0x22, AddF32) \ + OPC(0x23, SubF32) \ + OPC(0x24, MulF32) \ + OPC(0x25, DivF32) \ + RSV(0x26) \ + OPC(0x27, RemF32) \ + RSV(0x28) \ + RSV(0x29) \ + RSV(0x2A) \ + RSV(0x2B) \ + RSV(0x2C) \ + OPC(0x2D, AbsF32) \ + OPC(0x2E, NegF32) \ + OPC(0x2F, CeilF32) \ + RSV(0x30) \ + RSV(0x31) \ + OPC(0x32, FloorF32) \ + RSV(0x33) \ + RSV(0x34) \ + RSV(0x35) \ + RSV(0x36) \ + RSV(0x37) \ + RSV(0x38) \ + RSV(0x39) \ + RSV(0x3A) \ + RSV(0x3B) \ + RSV(0x3C) \ + RSV(0x3D) \ + RSV(0x3E) \ + RSV(0x3F) \ + OPC(0x40, CmpEQF32) \ + OPC(0x41, CmpNEF32) \ + OPC(0x42, CmpNZF32) \ + OPC(0x43, CmpLTF32) \ + RSV(0x44) \ + RSV(0x45) \ + RSV(0x46) \ + RSV(0x47) \ + RSV(0x48) \ + RSV(0x49) \ + RSV(0x4A) \ + RSV(0x4B) \ + RSV(0x4C) \ + RSV(0x4D) \ + RSV(0x4E) \ + RSV(0x4F) \ + RSV(0x50) \ + RSV(0x51) \ + RSV(0x52) \ + RSV(0x53) \ + RSV(0x54) \ + RSV(0x55) \ + RSV(0x56) \ + RSV(0x57) \ + RSV(0x58) \ + RSV(0x59) \ + RSV(0x5A) \ + RSV(0x5B) \ + RSV(0x5C) \ + RSV(0x5D) \ + RSV(0x5E) \ + RSV(0x5F) \ + RSV(0x60) \ + RSV(0x61) \ + RSV(0x62) \ + RSV(0x63) \ + RSV(0x64) \ + RSV(0x65) \ + RSV(0x66) \ + RSV(0x67) \ + RSV(0x68) \ + RSV(0x69) \ + RSV(0x6A) \ + RSV(0x6B) \ + RSV(0x6C) \ + RSV(0x6D) \ + RSV(0x6E) \ + RSV(0x6F) \ + RSV(0x70) \ + RSV(0x71) \ + RSV(0x72) \ + RSV(0x73) \ + RSV(0x74) \ + RSV(0x75) \ + RSV(0x76) \ + RSV(0x77) \ + RSV(0x78) \ + RSV(0x79) \ + RSV(0x7A) \ + RSV(0x7B) \ + RSV(0x7C) \ + RSV(0x7D) \ + RSV(0x7E) \ + RSV(0x7F) \ + RSV(0x80) \ + RSV(0x81) \ + RSV(0x82) \ + RSV(0x83) \ + RSV(0x84) \ + RSV(0x85) \ + RSV(0x86) \ + RSV(0x87) \ + RSV(0x88) \ + RSV(0x89) \ + RSV(0x8A) \ + RSV(0x8B) \ + RSV(0x8C) \ + RSV(0x8D) \ + RSV(0x8E) \ + RSV(0x8F) \ + RSV(0x90) \ + RSV(0x91) \ + RSV(0x92) \ + RSV(0x93) \ + RSV(0x94) \ + RSV(0x95) \ + RSV(0x96) \ + RSV(0x97) \ + RSV(0x98) \ + RSV(0x99) \ + RSV(0x9A) \ + RSV(0x9B) \ + RSV(0x9C) \ + RSV(0x9D) \ + RSV(0x9E) \ + RSV(0x9F) \ + RSV(0xA0) \ + RSV(0xA1) \ + RSV(0xA2) \ + RSV(0xA3) \ + RSV(0xA4) \ + RSV(0xA5) \ + RSV(0xA6) \ + RSV(0xA7) \ + RSV(0xA8) \ + RSV(0xA9) \ + RSV(0xAA) \ + RSV(0xAB) \ + RSV(0xAC) \ + RSV(0xAD) \ + RSV(0xAE) \ + RSV(0xAF) \ + RSV(0xB0) \ + RSV(0xB1) \ + RSV(0xB2) \ + RSV(0xB3) \ + RSV(0xB4) \ + RSV(0xB5) \ + RSV(0xB6) \ + RSV(0xB7) \ + RSV(0xB8) \ + RSV(0xB9) \ + RSV(0xBA) \ + RSV(0xBB) \ + RSV(0xBC) \ + RSV(0xBD) \ + RSV(0xBE) \ + RSV(0xBF) \ + RSV(0xC0) \ + RSV(0xC1) \ + RSV(0xC2) \ + RSV(0xC3) \ + RSV(0xC4) \ + RSV(0xC5) \ + RSV(0xC6) \ + RSV(0xC7) \ + RSV(0xC8) \ + RSV(0xC9) \ + RSV(0xCA) \ + RSV(0xCB) \ + RSV(0xCC) \ + RSV(0xCD) \ + RSV(0xCE) \ + RSV(0xCF) \ + RSV(0xD0) \ + RSV(0xD1) \ + RSV(0xD2) \ + RSV(0xD3) \ + RSV(0xD4) \ + RSV(0xD5) \ + RSV(0xD6) \ + RSV(0xD7) \ + RSV(0xD8) \ + RSV(0xD9) \ + RSV(0xDA) \ + RSV(0xDB) \ + RSV(0xDC) \ + RSV(0xDD) \ + RSV(0xDE) \ + RSV(0xDF) \ + RSV(0xE0) \ + RSV(0xE1) \ + RSV(0xE2) \ + RSV(0xE3) \ + RSV(0xE4) \ + RSV(0xE5) \ + RSV(0xE6) \ + RSV(0xE7) \ + RSV(0xE8) \ + RSV(0xE9) \ + RSV(0xEA) \ + RSV(0xEB) \ + RSV(0xEC) \ + RSV(0xED) \ + RSV(0xEE) \ + RSV(0xEF) \ + RSV(0xF0) \ + RSV(0xF1) \ + RSV(0xF2) \ + RSV(0xF3) \ + RSV(0xF4) \ + RSV(0xF5) \ + RSV(0xF6) \ + RSV(0xF7) \ + RSV(0xF8) \ + RSV(0xF9) \ + RSV(0xFA) \ + RSV(0xFB) \ + RSV(0xFC) \ + RSV(0xFD) \ + RSV(0xFE) \ + RSV(0xFF) + +typedef enum { + IREE_VM_OP_EXT_F64_GlobalLoadF64 = 0x00, + IREE_VM_OP_EXT_F64_GlobalStoreF64 = 0x01, + IREE_VM_OP_EXT_F64_GlobalLoadIndirectF64 = 0x02, + IREE_VM_OP_EXT_F64_GlobalStoreIndirectF64 = 0x03, + IREE_VM_OP_EXT_F64_RSV_0x04, + IREE_VM_OP_EXT_F64_RSV_0x05, + IREE_VM_OP_EXT_F64_RSV_0x06, + IREE_VM_OP_EXT_F64_RSV_0x07, + IREE_VM_OP_EXT_F64_ConstF64Zero = 0x08, + IREE_VM_OP_EXT_F64_ConstF64 = 0x09, + IREE_VM_OP_EXT_F64_RSV_0x0A, + IREE_VM_OP_EXT_F64_RSV_0x0B, + IREE_VM_OP_EXT_F64_RSV_0x0C, + IREE_VM_OP_EXT_F64_RSV_0x0D, + IREE_VM_OP_EXT_F64_RSV_0x0E, + IREE_VM_OP_EXT_F64_RSV_0x0F, + IREE_VM_OP_EXT_F64_RSV_0x10, + IREE_VM_OP_EXT_F64_RSV_0x11, + IREE_VM_OP_EXT_F64_RSV_0x12, + IREE_VM_OP_EXT_F64_RSV_0x13, + IREE_VM_OP_EXT_F64_ListGetF64 = 0x14, + IREE_VM_OP_EXT_F64_ListSetF64 = 0x15, + IREE_VM_OP_EXT_F64_RSV_0x16, + IREE_VM_OP_EXT_F64_RSV_0x17, + IREE_VM_OP_EXT_F64_RSV_0x18, + IREE_VM_OP_EXT_F64_RSV_0x19, + IREE_VM_OP_EXT_F64_RSV_0x1A, + IREE_VM_OP_EXT_F64_RSV_0x1B, + IREE_VM_OP_EXT_F64_RSV_0x1C, + IREE_VM_OP_EXT_F64_RSV_0x1D, + IREE_VM_OP_EXT_F64_SelectF64 = 0x1E, + IREE_VM_OP_EXT_F64_RSV_0x1F, + IREE_VM_OP_EXT_F64_SwitchF64 = 0x20, + IREE_VM_OP_EXT_F64_RSV_0x21, + IREE_VM_OP_EXT_F64_AddF64 = 0x22, + IREE_VM_OP_EXT_F64_SubF64 = 0x23, + IREE_VM_OP_EXT_F64_MulF64 = 0x24, + IREE_VM_OP_EXT_F64_DivF64 = 0x25, + IREE_VM_OP_EXT_F64_RSV_0x26, + IREE_VM_OP_EXT_F64_RemF64 = 0x27, + IREE_VM_OP_EXT_F64_RSV_0x28, + IREE_VM_OP_EXT_F64_RSV_0x29, + IREE_VM_OP_EXT_F64_RSV_0x2A, + IREE_VM_OP_EXT_F64_RSV_0x2B, + IREE_VM_OP_EXT_F64_RSV_0x2C, + IREE_VM_OP_EXT_F64_AbsF64 = 0x2D, + IREE_VM_OP_EXT_F64_NegF64 = 0x2E, + IREE_VM_OP_EXT_F64_CeilF64 = 0x2F, + IREE_VM_OP_EXT_F64_RSV_0x30, + IREE_VM_OP_EXT_F64_FloorF64 = 0x31, + IREE_VM_OP_EXT_F64_TruncF64F32 = 0x32, + IREE_VM_OP_EXT_F64_RSV_0x33, + IREE_VM_OP_EXT_F64_RSV_0x34, + IREE_VM_OP_EXT_F64_RSV_0x35, + IREE_VM_OP_EXT_F64_RSV_0x36, + IREE_VM_OP_EXT_F64_ExtF32F64 = 0x37, + IREE_VM_OP_EXT_F64_RSV_0x38, + IREE_VM_OP_EXT_F64_RSV_0x39, + IREE_VM_OP_EXT_F64_RSV_0x3A, + IREE_VM_OP_EXT_F64_RSV_0x3B, + IREE_VM_OP_EXT_F64_RSV_0x3C, + IREE_VM_OP_EXT_F64_RSV_0x3D, + IREE_VM_OP_EXT_F64_RSV_0x3E, + IREE_VM_OP_EXT_F64_RSV_0x3F, + IREE_VM_OP_EXT_F64_CmpEQF64 = 0x40, + IREE_VM_OP_EXT_F64_CmpNEF64 = 0x41, + IREE_VM_OP_EXT_F64_CmpNZF64 = 0x42, + IREE_VM_OP_EXT_F64_CmpLTF64 = 0x43, + IREE_VM_OP_EXT_F64_RSV_0x44, + IREE_VM_OP_EXT_F64_RSV_0x45, + IREE_VM_OP_EXT_F64_RSV_0x46, + IREE_VM_OP_EXT_F64_RSV_0x47, + IREE_VM_OP_EXT_F64_RSV_0x48, + IREE_VM_OP_EXT_F64_RSV_0x49, + IREE_VM_OP_EXT_F64_RSV_0x4A, + IREE_VM_OP_EXT_F64_RSV_0x4B, + IREE_VM_OP_EXT_F64_RSV_0x4C, + IREE_VM_OP_EXT_F64_RSV_0x4D, + IREE_VM_OP_EXT_F64_RSV_0x4E, + IREE_VM_OP_EXT_F64_RSV_0x4F, + IREE_VM_OP_EXT_F64_RSV_0x50, + IREE_VM_OP_EXT_F64_RSV_0x51, + IREE_VM_OP_EXT_F64_RSV_0x52, + IREE_VM_OP_EXT_F64_RSV_0x53, + IREE_VM_OP_EXT_F64_RSV_0x54, + IREE_VM_OP_EXT_F64_RSV_0x55, + IREE_VM_OP_EXT_F64_RSV_0x56, + IREE_VM_OP_EXT_F64_RSV_0x57, + IREE_VM_OP_EXT_F64_RSV_0x58, + IREE_VM_OP_EXT_F64_RSV_0x59, + IREE_VM_OP_EXT_F64_RSV_0x5A, + IREE_VM_OP_EXT_F64_RSV_0x5B, + IREE_VM_OP_EXT_F64_RSV_0x5C, + IREE_VM_OP_EXT_F64_RSV_0x5D, + IREE_VM_OP_EXT_F64_RSV_0x5E, + IREE_VM_OP_EXT_F64_RSV_0x5F, + IREE_VM_OP_EXT_F64_RSV_0x60, + IREE_VM_OP_EXT_F64_RSV_0x61, + IREE_VM_OP_EXT_F64_RSV_0x62, + IREE_VM_OP_EXT_F64_RSV_0x63, + IREE_VM_OP_EXT_F64_RSV_0x64, + IREE_VM_OP_EXT_F64_RSV_0x65, + IREE_VM_OP_EXT_F64_RSV_0x66, + IREE_VM_OP_EXT_F64_RSV_0x67, + IREE_VM_OP_EXT_F64_RSV_0x68, + IREE_VM_OP_EXT_F64_RSV_0x69, + IREE_VM_OP_EXT_F64_RSV_0x6A, + IREE_VM_OP_EXT_F64_RSV_0x6B, + IREE_VM_OP_EXT_F64_RSV_0x6C, + IREE_VM_OP_EXT_F64_RSV_0x6D, + IREE_VM_OP_EXT_F64_RSV_0x6E, + IREE_VM_OP_EXT_F64_RSV_0x6F, + IREE_VM_OP_EXT_F64_RSV_0x70, + IREE_VM_OP_EXT_F64_RSV_0x71, + IREE_VM_OP_EXT_F64_RSV_0x72, + IREE_VM_OP_EXT_F64_RSV_0x73, + IREE_VM_OP_EXT_F64_RSV_0x74, + IREE_VM_OP_EXT_F64_RSV_0x75, + IREE_VM_OP_EXT_F64_RSV_0x76, + IREE_VM_OP_EXT_F64_RSV_0x77, + IREE_VM_OP_EXT_F64_RSV_0x78, + IREE_VM_OP_EXT_F64_RSV_0x79, + IREE_VM_OP_EXT_F64_RSV_0x7A, + IREE_VM_OP_EXT_F64_RSV_0x7B, + IREE_VM_OP_EXT_F64_RSV_0x7C, + IREE_VM_OP_EXT_F64_RSV_0x7D, + IREE_VM_OP_EXT_F64_RSV_0x7E, + IREE_VM_OP_EXT_F64_RSV_0x7F, + IREE_VM_OP_EXT_F64_RSV_0x80, + IREE_VM_OP_EXT_F64_RSV_0x81, + IREE_VM_OP_EXT_F64_RSV_0x82, + IREE_VM_OP_EXT_F64_RSV_0x83, + IREE_VM_OP_EXT_F64_RSV_0x84, + IREE_VM_OP_EXT_F64_RSV_0x85, + IREE_VM_OP_EXT_F64_RSV_0x86, + IREE_VM_OP_EXT_F64_RSV_0x87, + IREE_VM_OP_EXT_F64_RSV_0x88, + IREE_VM_OP_EXT_F64_RSV_0x89, + IREE_VM_OP_EXT_F64_RSV_0x8A, + IREE_VM_OP_EXT_F64_RSV_0x8B, + IREE_VM_OP_EXT_F64_RSV_0x8C, + IREE_VM_OP_EXT_F64_RSV_0x8D, + IREE_VM_OP_EXT_F64_RSV_0x8E, + IREE_VM_OP_EXT_F64_RSV_0x8F, + IREE_VM_OP_EXT_F64_RSV_0x90, + IREE_VM_OP_EXT_F64_RSV_0x91, + IREE_VM_OP_EXT_F64_RSV_0x92, + IREE_VM_OP_EXT_F64_RSV_0x93, + IREE_VM_OP_EXT_F64_RSV_0x94, + IREE_VM_OP_EXT_F64_RSV_0x95, + IREE_VM_OP_EXT_F64_RSV_0x96, + IREE_VM_OP_EXT_F64_RSV_0x97, + IREE_VM_OP_EXT_F64_RSV_0x98, + IREE_VM_OP_EXT_F64_RSV_0x99, + IREE_VM_OP_EXT_F64_RSV_0x9A, + IREE_VM_OP_EXT_F64_RSV_0x9B, + IREE_VM_OP_EXT_F64_RSV_0x9C, + IREE_VM_OP_EXT_F64_RSV_0x9D, + IREE_VM_OP_EXT_F64_RSV_0x9E, + IREE_VM_OP_EXT_F64_RSV_0x9F, + IREE_VM_OP_EXT_F64_RSV_0xA0, + IREE_VM_OP_EXT_F64_RSV_0xA1, + IREE_VM_OP_EXT_F64_RSV_0xA2, + IREE_VM_OP_EXT_F64_RSV_0xA3, + IREE_VM_OP_EXT_F64_RSV_0xA4, + IREE_VM_OP_EXT_F64_RSV_0xA5, + IREE_VM_OP_EXT_F64_RSV_0xA6, + IREE_VM_OP_EXT_F64_RSV_0xA7, + IREE_VM_OP_EXT_F64_RSV_0xA8, + IREE_VM_OP_EXT_F64_RSV_0xA9, + IREE_VM_OP_EXT_F64_RSV_0xAA, + IREE_VM_OP_EXT_F64_RSV_0xAB, + IREE_VM_OP_EXT_F64_RSV_0xAC, + IREE_VM_OP_EXT_F64_RSV_0xAD, + IREE_VM_OP_EXT_F64_RSV_0xAE, + IREE_VM_OP_EXT_F64_RSV_0xAF, + IREE_VM_OP_EXT_F64_RSV_0xB0, + IREE_VM_OP_EXT_F64_RSV_0xB1, + IREE_VM_OP_EXT_F64_RSV_0xB2, + IREE_VM_OP_EXT_F64_RSV_0xB3, + IREE_VM_OP_EXT_F64_RSV_0xB4, + IREE_VM_OP_EXT_F64_RSV_0xB5, + IREE_VM_OP_EXT_F64_RSV_0xB6, + IREE_VM_OP_EXT_F64_RSV_0xB7, + IREE_VM_OP_EXT_F64_RSV_0xB8, + IREE_VM_OP_EXT_F64_RSV_0xB9, + IREE_VM_OP_EXT_F64_RSV_0xBA, + IREE_VM_OP_EXT_F64_RSV_0xBB, + IREE_VM_OP_EXT_F64_RSV_0xBC, + IREE_VM_OP_EXT_F64_RSV_0xBD, + IREE_VM_OP_EXT_F64_RSV_0xBE, + IREE_VM_OP_EXT_F64_RSV_0xBF, + IREE_VM_OP_EXT_F64_RSV_0xC0, + IREE_VM_OP_EXT_F64_RSV_0xC1, + IREE_VM_OP_EXT_F64_RSV_0xC2, + IREE_VM_OP_EXT_F64_RSV_0xC3, + IREE_VM_OP_EXT_F64_RSV_0xC4, + IREE_VM_OP_EXT_F64_RSV_0xC5, + IREE_VM_OP_EXT_F64_RSV_0xC6, + IREE_VM_OP_EXT_F64_RSV_0xC7, + IREE_VM_OP_EXT_F64_RSV_0xC8, + IREE_VM_OP_EXT_F64_RSV_0xC9, + IREE_VM_OP_EXT_F64_RSV_0xCA, + IREE_VM_OP_EXT_F64_RSV_0xCB, + IREE_VM_OP_EXT_F64_RSV_0xCC, + IREE_VM_OP_EXT_F64_RSV_0xCD, + IREE_VM_OP_EXT_F64_RSV_0xCE, + IREE_VM_OP_EXT_F64_RSV_0xCF, + IREE_VM_OP_EXT_F64_RSV_0xD0, + IREE_VM_OP_EXT_F64_RSV_0xD1, + IREE_VM_OP_EXT_F64_RSV_0xD2, + IREE_VM_OP_EXT_F64_RSV_0xD3, + IREE_VM_OP_EXT_F64_RSV_0xD4, + IREE_VM_OP_EXT_F64_RSV_0xD5, + IREE_VM_OP_EXT_F64_RSV_0xD6, + IREE_VM_OP_EXT_F64_RSV_0xD7, + IREE_VM_OP_EXT_F64_RSV_0xD8, + IREE_VM_OP_EXT_F64_RSV_0xD9, + IREE_VM_OP_EXT_F64_RSV_0xDA, + IREE_VM_OP_EXT_F64_RSV_0xDB, + IREE_VM_OP_EXT_F64_RSV_0xDC, + IREE_VM_OP_EXT_F64_RSV_0xDD, + IREE_VM_OP_EXT_F64_RSV_0xDE, + IREE_VM_OP_EXT_F64_RSV_0xDF, + IREE_VM_OP_EXT_F64_RSV_0xE0, + IREE_VM_OP_EXT_F64_RSV_0xE1, + IREE_VM_OP_EXT_F64_RSV_0xE2, + IREE_VM_OP_EXT_F64_RSV_0xE3, + IREE_VM_OP_EXT_F64_RSV_0xE4, + IREE_VM_OP_EXT_F64_RSV_0xE5, + IREE_VM_OP_EXT_F64_RSV_0xE6, + IREE_VM_OP_EXT_F64_RSV_0xE7, + IREE_VM_OP_EXT_F64_RSV_0xE8, + IREE_VM_OP_EXT_F64_RSV_0xE9, + IREE_VM_OP_EXT_F64_RSV_0xEA, + IREE_VM_OP_EXT_F64_RSV_0xEB, + IREE_VM_OP_EXT_F64_RSV_0xEC, + IREE_VM_OP_EXT_F64_RSV_0xED, + IREE_VM_OP_EXT_F64_RSV_0xEE, + IREE_VM_OP_EXT_F64_RSV_0xEF, + IREE_VM_OP_EXT_F64_RSV_0xF0, + IREE_VM_OP_EXT_F64_RSV_0xF1, + IREE_VM_OP_EXT_F64_RSV_0xF2, + IREE_VM_OP_EXT_F64_RSV_0xF3, + IREE_VM_OP_EXT_F64_RSV_0xF4, + IREE_VM_OP_EXT_F64_RSV_0xF5, + IREE_VM_OP_EXT_F64_RSV_0xF6, + IREE_VM_OP_EXT_F64_RSV_0xF7, + IREE_VM_OP_EXT_F64_RSV_0xF8, + IREE_VM_OP_EXT_F64_RSV_0xF9, + IREE_VM_OP_EXT_F64_RSV_0xFA, + IREE_VM_OP_EXT_F64_RSV_0xFB, + IREE_VM_OP_EXT_F64_RSV_0xFC, + IREE_VM_OP_EXT_F64_RSV_0xFD, + IREE_VM_OP_EXT_F64_RSV_0xFE, + IREE_VM_OP_EXT_F64_RSV_0xFF, +} iree_vm_ext_f64_op_t; + +#define IREE_VM_OP_EXT_F64_TABLE(OPC, RSV) \ + OPC(0x00, GlobalLoadF64) \ + OPC(0x01, GlobalStoreF64) \ + OPC(0x02, GlobalLoadIndirectF64) \ + OPC(0x03, GlobalStoreIndirectF64) \ + RSV(0x04) \ + RSV(0x05) \ + RSV(0x06) \ + RSV(0x07) \ + OPC(0x08, ConstF64Zero) \ + OPC(0x09, ConstF64) \ + RSV(0x0A) \ + RSV(0x0B) \ + RSV(0x0C) \ + RSV(0x0D) \ + RSV(0x0E) \ + RSV(0x0F) \ + RSV(0x10) \ + RSV(0x11) \ + RSV(0x12) \ + RSV(0x13) \ + OPC(0x14, ListGetF64) \ + OPC(0x15, ListSetF64) \ + RSV(0x16) \ + RSV(0x17) \ + RSV(0x18) \ + RSV(0x19) \ + RSV(0x1A) \ + RSV(0x1B) \ + RSV(0x1C) \ + RSV(0x1D) \ + OPC(0x1E, SelectF64) \ + RSV(0x1F) \ + OPC(0x20, SwitchF64) \ + RSV(0x21) \ + OPC(0x22, AddF64) \ + OPC(0x23, SubF64) \ + OPC(0x24, MulF64) \ + OPC(0x25, DivF64) \ + RSV(0x26) \ + OPC(0x27, RemF64) \ + RSV(0x28) \ + RSV(0x29) \ + RSV(0x2A) \ + RSV(0x2B) \ + RSV(0x2C) \ + OPC(0x2D, AbsF64) \ + OPC(0x2E, NegF64) \ + OPC(0x2F, CeilF64) \ + RSV(0x30) \ + OPC(0x31, FloorF64) \ + OPC(0x32, TruncF64F32) \ + RSV(0x33) \ + RSV(0x34) \ + RSV(0x35) \ + RSV(0x36) \ + OPC(0x37, ExtF32F64) \ + RSV(0x38) \ + RSV(0x39) \ + RSV(0x3A) \ + RSV(0x3B) \ + RSV(0x3C) \ + RSV(0x3D) \ + RSV(0x3E) \ + RSV(0x3F) \ + OPC(0x40, CmpEQF64) \ + OPC(0x41, CmpNEF64) \ + OPC(0x42, CmpNZF64) \ + OPC(0x43, CmpLTF64) \ + RSV(0x44) \ + RSV(0x45) \ + RSV(0x46) \ + RSV(0x47) \ + RSV(0x48) \ + RSV(0x49) \ + RSV(0x4A) \ + RSV(0x4B) \ + RSV(0x4C) \ + RSV(0x4D) \ + RSV(0x4E) \ + RSV(0x4F) \ + RSV(0x50) \ + RSV(0x51) \ + RSV(0x52) \ + RSV(0x53) \ + RSV(0x54) \ + RSV(0x55) \ + RSV(0x56) \ + RSV(0x57) \ + RSV(0x58) \ + RSV(0x59) \ + RSV(0x5A) \ + RSV(0x5B) \ + RSV(0x5C) \ + RSV(0x5D) \ + RSV(0x5E) \ + RSV(0x5F) \ + RSV(0x60) \ + RSV(0x61) \ + RSV(0x62) \ + RSV(0x63) \ + RSV(0x64) \ + RSV(0x65) \ + RSV(0x66) \ + RSV(0x67) \ + RSV(0x68) \ + RSV(0x69) \ + RSV(0x6A) \ + RSV(0x6B) \ + RSV(0x6C) \ + RSV(0x6D) \ + RSV(0x6E) \ + RSV(0x6F) \ + RSV(0x70) \ + RSV(0x71) \ + RSV(0x72) \ + RSV(0x73) \ + RSV(0x74) \ + RSV(0x75) \ + RSV(0x76) \ + RSV(0x77) \ + RSV(0x78) \ + RSV(0x79) \ + RSV(0x7A) \ + RSV(0x7B) \ + RSV(0x7C) \ + RSV(0x7D) \ + RSV(0x7E) \ + RSV(0x7F) \ + RSV(0x80) \ + RSV(0x81) \ + RSV(0x82) \ + RSV(0x83) \ + RSV(0x84) \ + RSV(0x85) \ + RSV(0x86) \ + RSV(0x87) \ + RSV(0x88) \ + RSV(0x89) \ + RSV(0x8A) \ + RSV(0x8B) \ + RSV(0x8C) \ + RSV(0x8D) \ + RSV(0x8E) \ + RSV(0x8F) \ + RSV(0x90) \ + RSV(0x91) \ + RSV(0x92) \ + RSV(0x93) \ + RSV(0x94) \ + RSV(0x95) \ + RSV(0x96) \ + RSV(0x97) \ + RSV(0x98) \ + RSV(0x99) \ + RSV(0x9A) \ + RSV(0x9B) \ + RSV(0x9C) \ + RSV(0x9D) \ + RSV(0x9E) \ + RSV(0x9F) \ + RSV(0xA0) \ + RSV(0xA1) \ + RSV(0xA2) \ + RSV(0xA3) \ + RSV(0xA4) \ + RSV(0xA5) \ + RSV(0xA6) \ + RSV(0xA7) \ + RSV(0xA8) \ + RSV(0xA9) \ + RSV(0xAA) \ + RSV(0xAB) \ + RSV(0xAC) \ + RSV(0xAD) \ + RSV(0xAE) \ + RSV(0xAF) \ + RSV(0xB0) \ + RSV(0xB1) \ + RSV(0xB2) \ + RSV(0xB3) \ + RSV(0xB4) \ + RSV(0xB5) \ + RSV(0xB6) \ + RSV(0xB7) \ + RSV(0xB8) \ + RSV(0xB9) \ + RSV(0xBA) \ + RSV(0xBB) \ + RSV(0xBC) \ + RSV(0xBD) \ + RSV(0xBE) \ + RSV(0xBF) \ + RSV(0xC0) \ + RSV(0xC1) \ + RSV(0xC2) \ + RSV(0xC3) \ + RSV(0xC4) \ + RSV(0xC5) \ + RSV(0xC6) \ + RSV(0xC7) \ + RSV(0xC8) \ + RSV(0xC9) \ + RSV(0xCA) \ + RSV(0xCB) \ + RSV(0xCC) \ + RSV(0xCD) \ + RSV(0xCE) \ + RSV(0xCF) \ + RSV(0xD0) \ + RSV(0xD1) \ + RSV(0xD2) \ + RSV(0xD3) \ + RSV(0xD4) \ + RSV(0xD5) \ + RSV(0xD6) \ + RSV(0xD7) \ + RSV(0xD8) \ + RSV(0xD9) \ + RSV(0xDA) \ + RSV(0xDB) \ + RSV(0xDC) \ + RSV(0xDD) \ + RSV(0xDE) \ + RSV(0xDF) \ + RSV(0xE0) \ + RSV(0xE1) \ + RSV(0xE2) \ + RSV(0xE3) \ + RSV(0xE4) \ + RSV(0xE5) \ + RSV(0xE6) \ + RSV(0xE7) \ + RSV(0xE8) \ + RSV(0xE9) \ + RSV(0xEA) \ + RSV(0xEB) \ + RSV(0xEC) \ + RSV(0xED) \ + RSV(0xEE) \ + RSV(0xEF) \ + RSV(0xF0) \ + RSV(0xF1) \ + RSV(0xF2) \ + RSV(0xF3) \ + RSV(0xF4) \ + RSV(0xF5) \ + RSV(0xF6) \ + RSV(0xF7) \ + RSV(0xF8) \ + RSV(0xF9) \ + RSV(0xFA) \ + RSV(0xFB) \ + RSV(0xFC) \ + RSV(0xFD) \ + RSV(0xFE) \ + RSV(0xFF) + +typedef enum { IREE_VM_OP_EXT_I64_GlobalLoadI64 = 0x00, IREE_VM_OP_EXT_I64_GlobalStoreI64 = 0x01, IREE_VM_OP_EXT_I64_GlobalLoadIndirectI64 = 0x02,
diff --git a/iree/vm/invocation.c b/iree/vm/invocation.c index b8f3abb..3e7808e 100644 --- a/iree/vm/invocation.c +++ b/iree/vm/invocation.c
@@ -47,20 +47,34 @@ switch (cconv_arguments.data[cconv_i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: { iree_vm_value_t value; IREE_RETURN_IF_ERROR(iree_vm_list_get_value_as( inputs, arg_i, IREE_VM_VALUE_TYPE_I32, &value)); memcpy(p, &value.i32, sizeof(int32_t)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: { iree_vm_value_t value; IREE_RETURN_IF_ERROR(iree_vm_list_get_value_as( inputs, arg_i, IREE_VM_VALUE_TYPE_I64, &value)); memcpy(p, &value.i64, sizeof(int64_t)); p += sizeof(int64_t); } break; + case IREE_VM_CCONV_TYPE_F32: { + iree_vm_value_t value; + IREE_RETURN_IF_ERROR(iree_vm_list_get_value_as( + inputs, arg_i, IREE_VM_VALUE_TYPE_F32, &value)); + memcpy(p, &value.f32, sizeof(float)); + p += sizeof(float); + } break; + case IREE_VM_CCONV_TYPE_F64: { + iree_vm_value_t value; + IREE_RETURN_IF_ERROR(iree_vm_list_get_value_as( + inputs, arg_i, IREE_VM_VALUE_TYPE_F64, &value)); + memcpy(p, &value.f64, sizeof(double)); + p += sizeof(double); + } break; case IREE_VM_CCONV_TYPE_REF: { // TODO(benvanik): see if we can't remove this retain by instead relying // on the caller still owning the list. @@ -101,16 +115,26 @@ switch (cconv_results.data[cconv_i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: { + case IREE_VM_CCONV_TYPE_I32: { iree_vm_value_t value = iree_vm_value_make_i32(*(int32_t*)p); IREE_RETURN_IF_ERROR(iree_vm_list_set_value(outputs, arg_i, &value)); p += sizeof(int32_t); } break; - case IREE_VM_CCONV_TYPE_INT64: { + case IREE_VM_CCONV_TYPE_I64: { iree_vm_value_t value = iree_vm_value_make_i64(*(int64_t*)p); IREE_RETURN_IF_ERROR(iree_vm_list_set_value(outputs, arg_i, &value)); p += sizeof(int64_t); } break; + case IREE_VM_CCONV_TYPE_F32: { + iree_vm_value_t value = iree_vm_value_make_f32(*(float*)p); + IREE_RETURN_IF_ERROR(iree_vm_list_set_value(outputs, arg_i, &value)); + p += sizeof(float); + } break; + case IREE_VM_CCONV_TYPE_F64: { + iree_vm_value_t value = iree_vm_value_make_f64(*(double*)p); + IREE_RETURN_IF_ERROR(iree_vm_list_set_value(outputs, arg_i, &value)); + p += sizeof(double); + } break; case IREE_VM_CCONV_TYPE_REF: { IREE_RETURN_IF_ERROR( iree_vm_list_set_ref_move(outputs, arg_i, (iree_vm_ref_t*)p));
diff --git a/iree/vm/list.c b/iree/vm/list.c index 03bfbe0..2600023 100644 --- a/iree/vm/list.c +++ b/iree/vm/list.c
@@ -17,12 +17,14 @@ #include "iree/base/alignment.h" // Size of each iree_vm_value_type_t in bytes. -static const iree_host_size_t kValueTypeSizes[5] = { +static const iree_host_size_t kValueTypeSizes[7] = { 0, // IREE_VM_VALUE_TYPE_NONE 1, // IREE_VM_VALUE_TYPE_I8 2, // IREE_VM_VALUE_TYPE_I16 4, // IREE_VM_VALUE_TYPE_I32 8, // IREE_VM_VALUE_TYPE_I64 + 4, // IREE_VM_VALUE_TYPE_F32 + 8, // IREE_VM_VALUE_TYPE_F64 }; static_assert(IREE_VM_VALUE_TYPE_COUNT == (sizeof(kValueTypeSizes) / sizeof(kValueTypeSizes[0])),
diff --git a/iree/vm/module.c b/iree/vm/module.c index 07aa8e1..2347eb1 100644 --- a/iree/vm/module.c +++ b/iree/vm/module.c
@@ -59,10 +59,12 @@ switch (cconv_fragment.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: required_size += sizeof(int32_t); break; - case IREE_VM_CCONV_TYPE_INT64: + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: required_size += sizeof(int64_t); break; case IREE_VM_CCONV_TYPE_REF: @@ -84,10 +86,12 @@ switch (cconv_fragment.data[i]) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: span_size += sizeof(int32_t); break; - case IREE_VM_CCONV_TYPE_INT64: + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: span_size += sizeof(int64_t); break; case IREE_VM_CCONV_TYPE_REF: @@ -129,10 +133,12 @@ switch (c) { case IREE_VM_CCONV_TYPE_VOID: break; - case IREE_VM_CCONV_TYPE_INT32: + case IREE_VM_CCONV_TYPE_I32: + case IREE_VM_CCONV_TYPE_F32: p += sizeof(int32_t); break; - case IREE_VM_CCONV_TYPE_INT64: + case IREE_VM_CCONV_TYPE_I64: + case IREE_VM_CCONV_TYPE_F64: p += sizeof(int64_t); break; case IREE_VM_CCONV_TYPE_REF:
diff --git a/iree/vm/module.h b/iree/vm/module.h index 8eabc0a..1e993f3 100644 --- a/iree/vm/module.h +++ b/iree/vm/module.h
@@ -207,8 +207,10 @@ } iree_vm_function_call_t; #define IREE_VM_CCONV_TYPE_VOID 'v' -#define IREE_VM_CCONV_TYPE_INT32 'i' -#define IREE_VM_CCONV_TYPE_INT64 'I' +#define IREE_VM_CCONV_TYPE_I32 'i' +#define IREE_VM_CCONV_TYPE_I64 'I' +#define IREE_VM_CCONV_TYPE_F32 'f' +#define IREE_VM_CCONV_TYPE_F64 'F' #define IREE_VM_CCONV_TYPE_REF 'r' #define IREE_VM_CCONV_TYPE_SPAN_START 'C' #define IREE_VM_CCONV_TYPE_SPAN_END 'D'
diff --git a/iree/vm/ops.h b/iree/vm/ops.h index 3afd05f..9ee40d9 100644 --- a/iree/vm/ops.h +++ b/iree/vm/ops.h
@@ -15,6 +15,7 @@ #ifndef IREE_VM_OPS_H_ #define IREE_VM_OPS_H_ +#include <math.h> #include <stdint.h> #include "iree/base/api.h" @@ -44,6 +45,11 @@ return condition ? true_value : false_value; } +static inline float vm_select_f32(int32_t condition, float true_value, + float false_value) { + return condition ? true_value : false_value; +} + //===------------------------------------------------------------------===// // Native integer arithmetic //===------------------------------------------------------------------===// @@ -71,6 +77,22 @@ static inline int32_t vm_xor_i32(int32_t lhs, int32_t rhs) { return lhs ^ rhs; } //===------------------------------------------------------------------===// +// Native floating-point arithmetic +//===------------------------------------------------------------------===// + +static inline float vm_add_f32(float lhs, float rhs) { return lhs + rhs; } +static inline float vm_sub_f32(float lhs, float rhs) { return lhs - rhs; } +static inline float vm_mul_f32(float lhs, float rhs) { return lhs * rhs; } +static inline float vm_div_f32(float lhs, float rhs) { return lhs / rhs; } +static inline float vm_rem_f32(float lhs, float rhs) { + return remainderf(lhs, rhs); +} +static inline float vm_abs_f32(float operand) { return fabsf(operand); } +static inline float vm_neg_f32(float operand) { return -operand; } +static inline float vm_ceil_f32(float operand) { return ceilf(operand); } +static inline float vm_floor_f32(float operand) { return floorf(operand); } + +//===------------------------------------------------------------------===// // Casting and type conversion/emulation //===------------------------------------------------------------------===// @@ -127,6 +149,17 @@ return (operand != 0) ? 1 : 0; } +static inline int32_t vm_cmp_eq_f32(float lhs, float rhs) { + return (lhs == rhs) ? 1 : 0; +} +static inline int32_t vm_cmp_ne_f32(float lhs, float rhs) { + return (lhs != rhs) ? 1 : 0; +} +static inline int32_t vm_cmp_nz_f32(float lhs) { return (lhs != 0.0f) ? 1 : 0; } +static inline int32_t vm_cmp_lt_f32(float lhs, float rhs) { + return (lhs < rhs) ? 1 : 0; +} + //===------------------------------------------------------------------===// // Control flow ops //===------------------------------------------------------------------===//
diff --git a/iree/vm/test/BUILD b/iree/vm/test/BUILD index af6820d..3368388 100644 --- a/iree/vm/test/BUILD +++ b/iree/vm/test/BUILD
@@ -35,15 +35,20 @@ name = "all_bytecode_modules_cc", srcs = [ ":arithmetic_ops.vmfb", + ":arithmetic_ops_f32.vmfb", ":arithmetic_ops_i64.vmfb", ":assignment_ops.vmfb", + ":assignment_ops_f32.vmfb", ":assignment_ops_i64.vmfb", ":comparison_ops.vmfb", + ":comparison_ops_f32.vmfb", ":comparison_ops_i64.vmfb", ":control_flow_ops.vmfb", ":conversion_ops.vmfb", ":conversion_ops_i64.vmfb", ":global_ops.vmfb", + ":global_ops_f32.vmfb", + ":global_ops_i64.vmfb", ":list_ops.vmfb", ":list_variant_ops.vmfb", ":shift_ops.vmfb", @@ -62,6 +67,12 @@ ) iree_bytecode_module( + name = "arithmetic_ops_f32", + src = "arithmetic_ops_f32.mlir", + flags = ["-iree-vm-ir-to-bytecode-module"], +) + +iree_bytecode_module( name = "arithmetic_ops_i64", src = "arithmetic_ops_i64.mlir", flags = ["-iree-vm-ir-to-bytecode-module"], @@ -74,6 +85,12 @@ ) iree_bytecode_module( + name = "assignment_ops_f32", + src = "assignment_ops_f32.mlir", + flags = ["-iree-vm-ir-to-bytecode-module"], +) + +iree_bytecode_module( name = "assignment_ops_i64", src = "assignment_ops_i64.mlir", flags = ["-iree-vm-ir-to-bytecode-module"], @@ -86,6 +103,12 @@ ) iree_bytecode_module( + name = "comparison_ops_f32", + src = "comparison_ops_f32.mlir", + flags = ["-iree-vm-ir-to-bytecode-module"], +) + +iree_bytecode_module( name = "comparison_ops_i64", src = "comparison_ops_i64.mlir", flags = ["-iree-vm-ir-to-bytecode-module"], @@ -118,6 +141,20 @@ ) iree_bytecode_module( + name = "global_ops_f32", + src = "global_ops_f32.mlir", + cc_namespace = "iree::vm::test", + flags = ["-iree-vm-ir-to-bytecode-module"], +) + +iree_bytecode_module( + name = "global_ops_i64", + src = "global_ops_i64.mlir", + cc_namespace = "iree::vm::test", + flags = ["-iree-vm-ir-to-bytecode-module"], +) + +iree_bytecode_module( name = "list_ops", src = "list_ops.mlir", cc_namespace = "iree::vm::test",
diff --git a/iree/vm/test/CMakeLists.txt b/iree/vm/test/CMakeLists.txt index 3154ac2..297ee57 100644 --- a/iree/vm/test/CMakeLists.txt +++ b/iree/vm/test/CMakeLists.txt
@@ -19,15 +19,20 @@ all_bytecode_modules_cc GENERATED_SRCS "arithmetic_ops.vmfb" + "arithmetic_ops_f32.vmfb" "arithmetic_ops_i64.vmfb" "assignment_ops.vmfb" + "assignment_ops_f32.vmfb" "assignment_ops_i64.vmfb" "comparison_ops.vmfb" + "comparison_ops_f32.vmfb" "comparison_ops_i64.vmfb" "control_flow_ops.vmfb" "conversion_ops.vmfb" "conversion_ops_i64.vmfb" "global_ops.vmfb" + "global_ops_f32.vmfb" + "global_ops_i64.vmfb" "list_ops.vmfb" "list_variant_ops.vmfb" "shift_ops.vmfb" @@ -54,6 +59,16 @@ iree_bytecode_module( NAME + arithmetic_ops_f32 + SRC + "arithmetic_ops_f32.mlir" + FLAGS + "-iree-vm-ir-to-bytecode-module" + PUBLIC +) + +iree_bytecode_module( + NAME arithmetic_ops_i64 SRC "arithmetic_ops_i64.mlir" @@ -74,6 +89,16 @@ iree_bytecode_module( NAME + assignment_ops_f32 + SRC + "assignment_ops_f32.mlir" + FLAGS + "-iree-vm-ir-to-bytecode-module" + PUBLIC +) + +iree_bytecode_module( + NAME assignment_ops_i64 SRC "assignment_ops_i64.mlir" @@ -94,6 +119,16 @@ iree_bytecode_module( NAME + comparison_ops_f32 + SRC + "comparison_ops_f32.mlir" + FLAGS + "-iree-vm-ir-to-bytecode-module" + PUBLIC +) + +iree_bytecode_module( + NAME comparison_ops_i64 SRC "comparison_ops_i64.mlir" @@ -148,6 +183,30 @@ iree_bytecode_module( NAME + global_ops_f32 + SRC + "global_ops_f32.mlir" + CC_NAMESPACE + "iree::vm::test" + FLAGS + "-iree-vm-ir-to-bytecode-module" + PUBLIC +) + +iree_bytecode_module( + NAME + global_ops_i64 + SRC + "global_ops_i64.mlir" + CC_NAMESPACE + "iree::vm::test" + FLAGS + "-iree-vm-ir-to-bytecode-module" + PUBLIC +) + +iree_bytecode_module( + NAME list_ops SRC "list_ops.mlir"
diff --git a/iree/vm/test/arithmetic_ops_f32.mlir b/iree/vm/test/arithmetic_ops_f32.mlir new file mode 100644 index 0000000..5e90136 --- /dev/null +++ b/iree/vm/test/arithmetic_ops_f32.mlir
@@ -0,0 +1,102 @@ +vm.module @arithmetic_ops_f32 { + + //===--------------------------------------------------------------------===// + // ExtF32: Native floating-point arithmetic + //===--------------------------------------------------------------------===// + + vm.export @test_add_f32 + vm.func @test_add_f32() { + %c1 = vm.const.f32 1.5 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.add.f32 %c1dno, %c1dno : f32 + %c2 = vm.const.f32 3.0 : f32 + vm.check.eq %v, %c2, "1.5+1.5=3" : f32 + vm.return + } + + vm.export @test_sub_f32 + vm.func @test_sub_f32() { + %c1 = vm.const.f32 3.0 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %c2 = vm.const.f32 2.5 : f32 + %c2dno = iree.do_not_optimize(%c2) : f32 + %v = vm.sub.f32 %c1dno, %c2dno : f32 + %c3 = vm.const.f32 0.5 : f32 + vm.check.eq %v, %c3, "3.0-2.5=0.5" : f32 + vm.return + } + + vm.export @test_mul_f32 + vm.func @test_mul_f32() { + %c1 = vm.const.f32 2.5 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.mul.f32 %c1dno, %c1dno : f32 + %c2 = vm.const.f32 6.25 : f32 + vm.check.eq %v, %c2, "2.5*2.5=6.25" : f32 + vm.return + } + + vm.export @test_div_f32 + vm.func @test_div_f32() { + %c1 = vm.const.f32 4.0 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %c2 = vm.const.f32 -2.0 : f32 + %c2dno = iree.do_not_optimize(%c2) : f32 + %v = vm.div.f32 %c1dno, %c2dno : f32 + %c3 = vm.const.f32 -2.0 : f32 + vm.check.eq %v, %c3, "4.0/-2.0=-2.0" : f32 + vm.return + } + + vm.export @test_rem_f32 + vm.func @test_rem_f32() { + %c1 = vm.const.f32 -3.0 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %c2 = vm.const.f32 -2.0 : f32 + %c2dno = iree.do_not_optimize(%c2) : f32 + %v = vm.rem.f32 %c1dno, %c2dno : f32 + %c3 = vm.const.f32 1.0 : f32 + vm.check.eq %v, %c3, "-3.0%-2.0=1.0" : f32 + vm.return + } + + vm.export @test_abs_f32 + vm.func @test_abs_f32() { + %c1 = vm.const.f32 -1.0 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.abs.f32 %c1dno : f32 + %c2 = vm.const.f32 1.0 : f32 + vm.check.eq %v, %c2, "abs(-1.0)=1.0" : f32 + vm.return + } + + vm.export @test_neg_f32 + vm.func @test_neg_f32() { + %c1 = vm.const.f32 -1.0 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.neg.f32 %c1dno : f32 + %c2 = vm.const.f32 1.0 : f32 + vm.check.eq %v, %c2, "neg(-1.0)=1.0" : f32 + vm.return + } + + vm.export @test_ceil_f32 + vm.func @test_ceil_f32() { + %c1 = vm.const.f32 1.5 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.ceil.f32 %c1dno : f32 + %c2 = vm.const.f32 2.0 : f32 + vm.check.eq %v, %c2, "ceil(1.5)=2.0" : f32 + vm.return + } + + vm.export @test_floor_f32 + vm.func @test_floor_f32() { + %c1 = vm.const.f32 1.5 : f32 + %c1dno = iree.do_not_optimize(%c1) : f32 + %v = vm.floor.f32 %c1dno : f32 + %c2 = vm.const.f32 1.0 : f32 + vm.check.eq %v, %c2, "floor(1.5)=1.0" : f32 + vm.return + } +}
diff --git a/iree/vm/test/assignment_ops_f32.mlir b/iree/vm/test/assignment_ops_f32.mlir new file mode 100644 index 0000000..e835115 --- /dev/null +++ b/iree/vm/test/assignment_ops_f32.mlir
@@ -0,0 +1,21 @@ +vm.module @assignment_ops_i64 { + + //===--------------------------------------------------------------------===// + // ExtF32: Conditional assignment + //===--------------------------------------------------------------------===// + + vm.export @test_select_f32 + vm.func @test_select_f32() { + %c0 = vm.const.i32 0 : i32 + %c0dno = iree.do_not_optimize(%c0) : i32 + %c1 = vm.const.i32 1 : i32 + %c1dno = iree.do_not_optimize(%c1) : i32 + %c2 = vm.const.f32 0.0 : f32 + %c3 = vm.const.f32 1.0 : f32 + %v1 = vm.select.f32 %c0dno, %c2, %c3 : f32 + vm.check.eq %v1, %c3, "0 ? 0 : 1 = 1" : f32 + %v2 = vm.select.f32 %c1dno, %c2, %c3 : f32 + vm.check.eq %v2, %c2, "1 ? 0 : 1 = 0" : f32 + vm.return + } +}
diff --git a/iree/vm/test/assignment_ops_i64.mlir b/iree/vm/test/assignment_ops_i64.mlir index 2e451ad..00370ab 100644 --- a/iree/vm/test/assignment_ops_i64.mlir +++ b/iree/vm/test/assignment_ops_i64.mlir
@@ -11,12 +11,10 @@ %c1 = vm.const.i32 1 : i32 %c1dno = iree.do_not_optimize(%c1) : i32 %c2 = vm.const.i64 0 : i64 - %c2dno = iree.do_not_optimize(%c2) : i64 %c3 = vm.const.i64 1 : i64 - %c3dno = iree.do_not_optimize(%c3) : i64 - %v1 = vm.select.i64 %c0dno, %c2dno, %c3dno : i64 + %v1 = vm.select.i64 %c0dno, %c2, %c3 : i64 vm.check.eq %v1, %c3, "0 ? 0 : 1 = 1" : i64 - %v2 = vm.select.i64 %c1dno, %c2dno, %c3dno : i64 + %v2 = vm.select.i64 %c1dno, %c2, %c3 : i64 vm.check.eq %v2, %c2, "1 ? 0 : 1 = 0" : i64 vm.return }
diff --git a/iree/vm/test/comparison_ops_f32.mlir b/iree/vm/test/comparison_ops_f32.mlir new file mode 100644 index 0000000..a409c05 --- /dev/null +++ b/iree/vm/test/comparison_ops_f32.mlir
@@ -0,0 +1,97 @@ +vm.module @comparison_ops_f32 { + + //===--------------------------------------------------------------------===// + // vm.cmp.lt.f32 + //===--------------------------------------------------------------------===// + + vm.export @test_cmp_lt_0_f32 + vm.func @test_cmp_lt_0_f32() { + %lhs = vm.const.f32 4.0 : f32 + %lhs_dno = iree.do_not_optimize(%lhs) : f32 + %rhs = vm.const.f32 -4.0 : f32 + %rhs_dno = iree.do_not_optimize(%rhs) : f32 + %actual = vm.cmp.lt.f32 %lhs_dno, %rhs_dno : f32 + %expected = vm.const.i32 0 : i32 + vm.check.eq %actual, %expected, "4.0 < -4.0" : i32 + vm.return + } + + vm.export @test_cmp_lt_1_f32 + vm.func @test_cmp_lt_1_f32() { + %lhs = vm.const.f32 -4.0 : f32 + %lhs_dno = iree.do_not_optimize(%lhs) : f32 + %rhs = vm.const.f32 4.0 : f32 + %rhs_dno = iree.do_not_optimize(%rhs) : f32 + %actual = vm.cmp.lt.f32 %lhs_dno, %rhs_dno : f32 + %expected = vm.const.i32 1 : i32 + vm.check.eq %actual, %expected, "-4.0 < 4.0" : i32 + vm.return + } + + //===--------------------------------------------------------------------===// + // vm.cmp.*.f32 pseudo-ops + //===--------------------------------------------------------------------===// + // NOTE: all of these are turned in to some variants of vm.cmp.lt by the + // compiler and are here as a way to test the runtime behavior of the + // pseudo-op expansions. + + vm.export @test_cmp_lte_f32 + vm.func @test_cmp_lte_f32() { + %true = vm.const.i32 1 : i32 + %false = vm.const.i32 0 : i32 + + %cn2 = vm.const.f32 -2.0 : f32 + %cn2_dno = iree.do_not_optimize(%cn2) : f32 + %c2 = vm.const.f32 2.0 : f32 + %c2_dno = iree.do_not_optimize(%c2) : f32 + + %cmp_0 = vm.cmp.lte.f32 %cn2_dno, %c2_dno : f32 + vm.check.eq %cmp_0, %true, "-2 <= 2" : i32 + %cmp_1 = vm.cmp.lte.f32 %c2_dno, %cn2_dno : f32 + vm.check.eq %cmp_1, %false, "2 <= -2" : i32 + %cmp_2 = vm.cmp.lte.f32 %c2_dno, %c2_dno : f32 + vm.check.eq %cmp_2, %true, "2 <= 2" : i32 + + vm.return + } + + vm.export @test_cmp_gt_f32 + vm.func @test_cmp_gt_f32() { + %true = vm.const.i32 1 : i32 + %false = vm.const.i32 0 : i32 + + %cn2 = vm.const.f32 -2.0 : f32 + %cn2_dno = iree.do_not_optimize(%cn2) : f32 + %c2 = vm.const.f32 2.0 : f32 + %c2_dno = iree.do_not_optimize(%c2) : f32 + + %cmp_0 = vm.cmp.gt.f32 %cn2_dno, %c2_dno : f32 + vm.check.eq %cmp_0, %false, "-2 > 2" : i32 + %cmp_1 = vm.cmp.gt.f32 %c2_dno, %cn2_dno : f32 + vm.check.eq %cmp_1, %true, "2 > -2" : i32 + %cmp_2 = vm.cmp.gt.f32 %c2_dno, %c2_dno : f32 + vm.check.eq %cmp_2, %false, "2 > 2" : i32 + + vm.return + } + + vm.export @test_cmp_gte_f32 + vm.func @test_cmp_gte_f32() { + %true = vm.const.i32 1 : i32 + %false = vm.const.i32 0 : i32 + + %cn2 = vm.const.f32 -2.0 : f32 + %cn2_dno = iree.do_not_optimize(%cn2) : f32 + %c2 = vm.const.f32 2.0 : f32 + %c2_dno = iree.do_not_optimize(%c2) : f32 + + %cmp_0 = vm.cmp.gte.f32 %cn2_dno, %c2_dno : f32 + vm.check.eq %cmp_0, %false, "-2 >= 2" : i32 + %cmp_1 = vm.cmp.gte.f32 %c2_dno, %cn2_dno : f32 + vm.check.eq %cmp_1, %true, "2 >= -2" : i32 + %cmp_2 = vm.cmp.gte.f32 %c2_dno, %c2_dno : f32 + vm.check.eq %cmp_2, %true, "2 >= 2" : i32 + + vm.return + } +}
diff --git a/iree/vm/test/comparison_ops_i64.mlir b/iree/vm/test/comparison_ops_i64.mlir index 3eca978..0f87162 100644 --- a/iree/vm/test/comparison_ops_i64.mlir +++ b/iree/vm/test/comparison_ops_i64.mlir
@@ -168,5 +168,4 @@ vm.return } - }
diff --git a/iree/vm/test/global_ops_f32.mlir b/iree/vm/test/global_ops_f32.mlir new file mode 100644 index 0000000..c88d52c --- /dev/null +++ b/iree/vm/test/global_ops_f32.mlir
@@ -0,0 +1,28 @@ +vm.module @global_ops { + + //===--------------------------------------------------------------------===// + // global.f32 + //===--------------------------------------------------------------------===// + + vm.global.f32 @c42 42.5 : f32 + vm.global.f32 @c107_mut mutable 107.5 : f32 + // TODO(simon-camp): Add test for initializer + + vm.export @test_global_load_f32 + vm.func @test_global_load_f32() { + %actual = vm.global.load.f32 @c42 : f32 + %expected = vm.const.f32 42.5 : f32 + vm.check.eq %actual, %expected, "@c42 != 42.5" : f32 + vm.return + } + + vm.export @test_global_store_f32 + vm.func @test_global_store_f32() { + %c17 = vm.const.f32 17.5 : f32 + vm.global.store.f32 %c17, @c107_mut : f32 + %actual = vm.global.load.f32 @c107_mut : f32 + vm.check.eq %actual, %c17, "@c107_mut != 17.5" : f32 + vm.return + } + +}
diff --git a/iree/vm/test/global_ops_i64.mlir b/iree/vm/test/global_ops_i64.mlir new file mode 100644 index 0000000..08077b9 --- /dev/null +++ b/iree/vm/test/global_ops_i64.mlir
@@ -0,0 +1,28 @@ +vm.module @global_ops { + + //===--------------------------------------------------------------------===// + // global.i64 + //===--------------------------------------------------------------------===// + + vm.global.i64 @c42 42 : i64 + vm.global.i64 @c107_mut mutable 107 : i64 + // TODO(simon-camp): Add test for initializer + + vm.export @test_global_load_i64 + vm.func @test_global_load_i64() { + %actual = vm.global.load.i64 @c42 : i64 + %expected = vm.const.i64 42 : i64 + vm.check.eq %actual, %expected, "@c42 != 42" : i64 + vm.return + } + + vm.export @test_global_store_i64 + vm.func @test_global_store_i64() { + %c17 = vm.const.i64 17 : i64 + vm.global.store.i64 %c17, @c107_mut : i64 + %actual = vm.global.load.i64 @c107_mut : i64 + vm.check.eq %actual, %c17, "@c107_mut != 17" : i64 + vm.return + } + +}
diff --git a/iree/vm/value.h b/iree/vm/value.h index 3364e0f..aab6a57 100644 --- a/iree/vm/value.h +++ b/iree/vm/value.h
@@ -38,8 +38,12 @@ IREE_VM_VALUE_TYPE_I32 = 3, // int64_t. IREE_VM_VALUE_TYPE_I64 = 4, + // float. + IREE_VM_VALUE_TYPE_F32 = 5, + // double. + IREE_VM_VALUE_TYPE_F64 = 6, - IREE_VM_VALUE_TYPE_MAX = IREE_VM_VALUE_TYPE_I64, + IREE_VM_VALUE_TYPE_MAX = IREE_VM_VALUE_TYPE_F64, IREE_VM_VALUE_TYPE_COUNT = IREE_VM_VALUE_TYPE_MAX + 1, } iree_vm_value_type_t; @@ -54,6 +58,8 @@ int16_t i16; int32_t i32; int64_t i64; + float f32; + double f64; uint8_t value_storage[IREE_VM_VALUE_STORAGE_SIZE]; // max size of all value // types @@ -67,7 +73,7 @@ return result; } -// TODO(#5542) Check the value type before accessing the union +// TODO(#5542): check the value type before accessing the union. static inline int32_t iree_vm_value_get_i32(iree_vm_value_t *value) { return value->i32; } @@ -79,11 +85,35 @@ return result; } -// TODO(#5542) Check the value type before accessing the union +// TODO(#5542): check the value type before accessing the union. static inline int64_t iree_vm_value_get_i64(iree_vm_value_t *value) { return value->i64; } +static inline iree_vm_value_t iree_vm_value_make_f32(int32_t value) { + iree_vm_value_t result; + result.type = IREE_VM_VALUE_TYPE_F32; + result.f32 = value; + return result; +} + +// TODO(#5542): check the value type before accessing the union. +static inline float iree_vm_value_get_f32(iree_vm_value_t *value) { + return value->f32; +} + +static inline iree_vm_value_t iree_vm_value_make_f64(double value) { + iree_vm_value_t result; + result.type = IREE_VM_VALUE_TYPE_F64; + result.f64 = value; + return result; +} + +// TODO(#5542): check the value type before accessing the union. +static inline double iree_vm_value_get_f64(iree_vm_value_t *value) { + return value->f64; +} + #ifdef __cplusplus } // extern "C" #endif // __cplusplus