[Codegen] Materialize encoding info for convolution with NCHWc layout (#24714)
Implements convolution encoding materialization for data-tiled layouts.
Layouts:
- Input: [N, IC/c0, H, W, c0]
- Filter: [OC/k0, IC/c0, FH, FW, c0, k0]
- Output: [N, OC/k0, OH, OW, k0]
where k0 and c0 are the inner tile sizes for the output and input
channels, respectively.
Scope:
- Only 2D convolutions receive a data-tiled layout.
- Grouped, depthwise, 1D, and 3D convolutions, and non-unit dilations,
all materialize to the identity layout (existing un-tiled path, no
behavior change for these cases).
- Arbitrary strides are supported.
- Supports packed rank-5 input/output and rank-6 filter tensors. Rank-4
input/output is also accepted when `N=1` batch dimension has been folded
by upstream passes.
- Currently supports fp32 convolutions only.
Supported input forms:
- nhwc_hwcf
- nchw_fchw
- nhwc_fhwc
All are materialized to the same packed NCHWc layout above.
Architecture-specific inner tiles:
| Architecture | Condition | Inner tile (OC, IC) | Target ISA |
|--------------|-------------------|---------------------|-----------------|
| x86-64 | float, `+avx512f` | `{16,16}` | `VFMADD*` (zmm) |
| arm64 | float | `{8,8}` | `FMLA` (NEON) |
All other configurations materialize to the identity layout.
Layout motivation can be found here:
https://hackmd.io/@phemashekar/conv-dt-layout
---
Co-authored-by: Jelle Schuhmacher <schuehmacher@roofline.ai>
Co-authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Signed-off-by: Pooja Hemashekar <hemashekar@roofline.ai>
---------
Signed-off-by: Pooja Hemashekar <hemashekar@roofline.ai>
Co-authored-by: Jelle Schuhmacher <schuehmacher@roofline.ai>
Co-authored-by: Ege Beysel <beyselege@gmail.com>IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.
See our website for project details, user guides, and instructions on building from source.
Releases notes are published on GitHub releases.
| Package | Release status |
|---|---|
| GitHub release (stable) | |
| GitHub release (nightly) | |
iree-base-compiler | |
iree-base-runtime |
For more details on the release process, see https://iree.dev/developers/general/release-management/.
| Operating system | Build status |
|---|---|
| Linux | |
| macOS | |
| macOS |
For the full list of workflows see https://iree.dev/developers/general/github-actions/.
See our website for more information.
Community meeting recordings: IREE YouTube channel
| Date | Title | Recording | Slides |
|---|---|---|---|
| 2025-06-10 | Data-Tiling in IREE: Achieving High Performance Through Compiler Design (AsiaLLVM) | recording | slides |
| 2025-05-17 | Introduction to GPU architecture and IREE's GPU CodeGen Pipeline | recording | slides |
| 2025-02-12 | The Long Tail of AI: SPIR-V in IREE and MLIR (Vulkanised) | recording | slides |
| 2024-10-01 | Unveiling the Inner Workings of IREE: An MLIR-Based Compiler for Diverse Hardware | recording | |
| 2021-06-09 | IREE Runtime Design Tech Talk | recording | slides |
| 2020-08-20 | IREE CodeGen (MLIR Open Design Meeting) | recording | slides |
| 2020-03-18 | Interactive HAL IR Walkthrough | recording | |
| 2020-01-31 | End-to-end MLIR Workflow in IREE (MLIR Open Design Meeting) | recording | slides |
IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.