tree 7d9fcd89aacca7f0b4d74d5b4b5596d26bf82a82
parent 0492b214495cda17591a865027fb331a32da1fe9
author Pooja Hemashekar <hemashekar@roofline.ai> 1788353126 +0200
committer GitHub <noreply@github.com> 1788353126 +0200
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[CI] Add bare-metal RISCV 64 sample and QEMU smoke test (#24844)

Adds `samples/baremetal_riscv64`, a single-op inference runner for
bare-metal RISCV 64 under `qemu-system-riscv64` (`-machine virt`, no OS,
semihosted I/O), together with a pkgci smoke test.

The sample covers two execution paths:
- `llvm-cpu` using `inline-dynamic` and the embedded-ELF loader.
- `vmvx-inline` using `inline-static`.

The runner uses the inline HAL instead of the full-HAL implementation
following `samples/simple_embedding`, because HAL device creation
currently requires a proactor that `IREE_PLATFORM_GENERIC` does not
provide.

The runtime is compiled and linked using an xPack GCC/newlib sysroot.
Its newlib is built with `-mcmodel=medany` required for QEMUs RAM base
and provides `semihost.specs` for semihosted I/O and exit handling.

No HAL device drivers are enabled; the embedded-ELF loader is enabled
explicitly for the LLVMCPU runner. The sample is `EXCLUDE_FROM_ALL` and
CI builds only `samples/baremetal_riscv64/all`, so it does not affect
other Generic RISCV builds.


Assisted-by: Claude Code

Signed-off-by: Pooja Hemashekar <hemashekar@roofline.ai>