commit 8c88429494d3e8a7e0e53962776a2b6dc6ebd215
author Han-Chung Wang <hanchung@google.com> Wed Aug 16 12:47:54 2023 -0700
committer GitHub <noreply@github.com> Wed Aug 16 12:47:54 2023 -0700
tree 85530f007f33c71479f7e93fd255d382f0da65a2
parent 7e37aeb356b6bbdd0313af8b52f556196eed4aaa

[CPU] Add memref aliasing ops folding right before sub-type emulation (#14569)

Fixes https://github.com/openxla/iree/issues/14567

compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp

diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp
index 4c34d3f..261a169 100644
--- a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp
+++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp
@@ -740,6 +740,7 @@
   // (HAL, IREE, Linalg, CF) -> LLVM
   passManager.addNestedPass<func::FuncOp>(arith::createArithExpandOpsPass());
   passManager.addNestedPass<func::FuncOp>(memref::createExpandOpsPass());
+  passManager.addPass(memref::createFoldMemRefAliasOpsPass());
   passManager.addPass(createEmulateNarrowTypePass());
   if (clInstrumentMemoryAccesses) {
     passManager.addNestedPass<func::FuncOp>(