commit | 7843ad15082cae53c134517b0c7c248fd2652638 | [log] [tgz] |
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author | Marius Brehler <marius.brehler@iml.fraunhofer.de> | Tue Jul 05 18:12:15 2022 +0200 |
committer | GitHub <noreply@github.com> | Tue Jul 05 09:12:15 2022 -0700 |
tree | f04662ec86d2aa58cf92cfe552f8a8c933dd4e12 | |
parent | fd7f4dff6964921c1cac61209835e02cf9e5878a [diff] |
Split the alignment flag for non 64-bit types (#9715) Splits out the ops for remaining, non 64-bit types from the `IREE_MEMORY_ACCESS_ALIGNMENT_REQUIRED` flag and introduces new flags for the other bit widths. Splitting into own flags for 8, 16 and 32-bit seems useful since e.g. the Cortex-M7 processor has unaligned support for * LDR/STR (Load/Store Word) and * LDRH/STRH (Load/Store Halfword), see [1], whereas a Cortex-M4 processor "only" has unaligned support for LDR/STR, see [2]. [1] https://developer.arm.com/documentation/ddi0489/b/programmers-model/system-address-map/unaligned-accesses-that-cross-regions [2] https://developer.arm.com/documentation/ddi0439/b/Programmers-Model/System-address-map/Unaligned-accesses-that-cross-regions
IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.
See our website for project details, user guides, and instructions on building from source.
IREE is still in its early phase. We have settled down on the overarching infrastructure and are actively improving various software components as well as project logistics. It is still quite far from ready for everyday use and is made available without any support at the moment. With that said, we welcome any kind of feedback on any communication channels!
See our website for more information.
IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.