[LLVMGPU][ROCDL] Add pass to group global loads for better instruction scheduling (#24247)

Adds LLVMGPUGroupGlobalLoadsPass which moves global loads in the same
block to be adjacent to each other when they are separated by pure
address computation ops. The pass moves each load along with its
transitive dependency chain to be right after the preceding global load.

This improves performance in situations where LLVM is not able to
convert address computation into a single base + constant offset. In
such cases, instruction scheduling can become pessimistic and each
global load needs to be waited on before the next is issued. With this
instruction reordering, all global loads are issued together after
address computation is completed.

Based on benchmarks with this change alone, we don't have any cases in
our suite of kernels that runs into this issue today. However, some
convolution shapes run into the issue after the changes in
https://github.com/iree-org/iree/pull/24245, and this PR prevents such
regressions.

This is only enabled for ROCDL in this PR, because we don't have any
data points to support adding it to other pipelines yet.

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Signed-off-by: Max Dawkins <max.dawkins@gmail.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>