[VectorDistribute] Lower and distribute `async_dma` (#24299)

Pass to distribute and lower `async_dma` operations at the workgroup
level to `amdgpu.gather_to_lds` operations at the thread-level (with
threads in each subgroup collaborating).

The pass shares helpers with the existing GPU pass to distribute
operations based on layouts, but as the `async_dma` operation does not
have `vector` operands or results, lowering and distribution are
implemented as a separate pass. The changes to
`GPUNestedLayoutDistributionPatterns.cpp` are therefore mainly a code
move extracting shared helpers to the new
`GPUNestedLayoutUtils.[h|cpp]`.

The basic idea of the distribution is to construct a (nested) layout
that represents how the data-transfer is split across subgroups and
threads to perform the full transfer with direct-to-LDS compatible
operations. The layout is constructed in stages:
1. We choose the DMA size for the given target that fulfills the
requirements and determine the element tile based on the size of the
transfer per thread from the DMA size (`distributeFromInnermost`).
2. The element tile is given by the number of threads in subgroup
(`distributeFromInnermost`).
3. Outer tile is always all-ones.
4. We distribute the transfer to the configured number of subgroups
(`distributeFromOutermost`).
5. Whatever is left after these steps ends up as the batch tile of each
thread.

Once we have that layout, we can use the shared helpers for the
mechanics of distributing the operation.

The distribution fails if any of the requirements are not met. This is
mostly a defensive check, the pass inserting the `async_dma` operations
(will be added in a different PR) should only insert `async_dma`
operations if the prerequisites can be met with the available DMA sizes
for the transfer shape etc. Therefore, the pass also fails if any of the
`async_dma` operations could not be distributed and lowered.

Swizzling and gather semantics are not part of this PR and will be added
in follow-up PRs.

This is part of https://github.com/iree-org/iree/issues/23782.

Assisted-by: Claude Code and Codex

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Signed-off-by: Lukas Sommer <lukas.sommer@amd.com>