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opensecura / 3p / openxla / iree / 62c4f988c56aee550d281273f0fe476224a868fe
commit62c4f988c56aee550d281273f0fe476224a868fe[log] [tgz]
authorBen Vanik <ben.vanik@gmail.com>Tue Dec 12 18:01:52 2023 -0800
committerGitHub <noreply@github.com>Wed Dec 13 02:01:52 2023 +0000
tree80955c2d9d55b0bf2a78b4dea4dc6700d34ec699
parent0b7b74dccdd251c747750552e4bbbae0fd0accb0 [diff]
Replacing cpuinfo on Mac and adding support for E/P cores. (#15891)

Topology selection now takes a performance level flag indicating which
core types should be included in heterogeneous configurations.
`IREE_TASK_TOPOLOGY_PERFORMANCE_LEVEL_ANY` selects all cores (as default
before this PR) while `_LOW` and `_HIGH` restrict to efficiency and
performance cores respectively. Currently only Mac/iOS and Apple chips
on Linux handle this detection but as we replace cpuinfo on Linux we can
add support for heterogeneous x86 chips there too. Windows should be
easy to support as they expose the performance level of each core but I
don't have a machine to test with today and the flag is ignored.

cpuinfo was pretty useless to us on Mac so it was easy to switch over to
our own detection. There's some missing features around cache sharing
but that doesn't mean anything on Mac as Apple doesn't allow for thread
pinning and we can't factor constructive cache sharing into our
scheduling logic.

Fun charts on my M2 showing `--task_topology_performance_level=low`,
`--task_topology_performance_level=high`, and
`--task_topology_performance_level=any` respectively:

![image](https://github.com/openxla/iree/assets/75337/6dc0b090-b0ff-4ded-ac48-6bfe6f4bcb16)

![image](https://github.com/openxla/iree/assets/75337/f81850dc-ce53-4698-8459-c3efac5e8e54)

![image](https://github.com/openxla/iree/assets/75337/392a22dc-1aa1-438d-b576-8a6dd66dd023)
16 files changed
tree: 80955c2d9d55b0bf2a78b4dea4dc6700d34ec699
  1. .devcontainer/
  2. .github/
  3. build_tools/
  4. compiler/
  5. docs/
  6. experimental/
  7. integrations/
  8. lib/
  9. llvm-external-projects/
  10. runtime/
  11. samples/
  12. tests/
  13. third_party/
  14. tools/
  15. .bazel_to_cmake.cfg.py
  16. .bazelignore
  17. .bazelrc
  18. .bazelversion
  19. .clang-format
  20. .dockerignore
  21. .git-blame-ignore-revs
  22. .gitignore
  23. .gitmodules
  24. .yamllint.yml
  25. AUTHORS
  26. BUILD.bazel
  27. CITATION.cff
  28. CMakeLists.txt
  29. configure_bazel.py
  30. CONTRIBUTING.md
  31. LICENSE
  32. README.md
  33. WORKSPACE
README.md

IREE: Intermediate Representation Execution Environment

IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.

See our website for project details, user guides, and instructions on building from source.

CI Status

Project Status

IREE is still in its early phase. We have settled down on the overarching infrastructure and are actively improving various software components as well as project logistics. It is still quite far from ready for everyday use and is made available without any support at the moment. With that said, we welcome any kind of feedback on any communication channels!

Communication Channels

Related Project Channels

  • MLIR topic within LLVM Discourse: IREE is enabled by and heavily relies on MLIR. IREE sometimes is referred to in certain MLIR discussions. Useful if you are also interested in MLIR evolution.

Architecture Overview

IREE Architecture IREE Architecture

See our website for more information.

Presentations and Talks

License

IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.