)]}'
{
  "commit": "5eb55e74f326427ea56b4a2160aa08ff33a9e740",
  "tree": "f263cead2e31882b9f9ab5455929db8691faaaec",
  "parents": [
    "fcdfe3212b3f65a8a578457cc020fbbe4c982edc"
  ],
  "author": {
    "name": "Christopher McGirr",
    "email": "mcgirr@roofline.ai",
    "time": "Wed Jun 03 14:32:57 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Jun 03 14:32:57 2026 +0200"
  },
  "message": "[CodeGen][SPIRV] Improved Matmul Tiling Heuristic for VideoCoreVII (#24559)\n\nThe generic SPIR-V matmul configuration is not tuned for the VideoCore\nVII. Empirically, the heuristic added here yields on-average better\nresults on ResNet-style workloads by choosing workgroup/thread/reduction\ntilings that seem to favor this GPU.\n\nOnly matmul ops with 8/16/32-bit element types and 2D/3D iteration\n(matmul / batch matmul) are handled; anything else returns `failure()`\nand falls through to the default SPIRV configuration.\n\nOne that seems to get on average better results with resnet.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "229d85a858f7b052c3eec41a62e22f2035c460a7",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/SPIRV/VideoCoreConfig.cpp",
      "new_id": "4ff8cb51ab1747926c87ec683fabff239f41d56b",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/SPIRV/VideoCoreConfig.cpp"
    },
    {
      "type": "modify",
      "old_id": "fa28f5f9d9fca284179dee3a8d8372a081dc7a25",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/SPIRV/test/config_broadcom_matmul.mlir",
      "new_id": "5d2568ad2351ed6932fe57188f284fa502f74e00",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/SPIRV/test/config_broadcom_matmul.mlir"
    }
  ]
}