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opensecura / 3p / openxla / iree / 5d8b054a96d24c897b5ceb2971d524e68b690463
commit5d8b054a96d24c897b5ceb2971d524e68b690463[log] [tgz]
authorScott Todd <scotttodd@google.com>Thu Dec 01 15:36:11 2022 -0800
committerGitHub <noreply@github.com>Thu Dec 01 15:36:11 2022 -0800
tree8baa510f4fa7b78004b98d55d300414593415816
parent4ccfe7909ec38cd12faca525d3830242599ead35 [diff]
[WebGPU] Push constants Storage i32 -> Uniform vector<4xi32>. (#11392)

We discussed this [here on
Discord](https://discord.com/channels/689900678990135345/867052513935753277/1047198677514600518).

When using `tensor<Nxi32>` we get an error like this from Tint:
```
Tint reported 1 error(s) for a SPIR-V program, see diagnostics:
error: line:36: Structure id 8 decorated as Block for variable in
  Uniform storage class must follow relaxed uniform buffer layout rules:
  member 0 contains an array with stride 4 not satisfying alignment to 16
```

Following the spec:
https://www.w3.org/TR/WGSL/#address-space-layout-constraints, we should
be aligning to 16. Switching to `tensor<Nxvector<4xi32>>` gives us that
alignment.

This change packs a conceptual array of `i32`s into an array of
`vector<4xi32>`s - possibly with unused elements at the end. Unpacking
changes from using just `tensor::ExtractOp` to using `tensor::ExtractOp`
(to get one of the vec4s) -> `vector::ExtractElementOp` (to get the
specific element).
4 files changed
tree: 8baa510f4fa7b78004b98d55d300414593415816
  1. .github/
  2. benchmarks/
  3. build_tools/
  4. compiler/
  5. docs/
  6. experimental/
  7. integrations/
  8. llvm-external-projects/
  9. runtime/
  10. samples/
  11. tests/
  12. third_party/
  13. tools/
  14. .bazelignore
  15. .bazelrc
  16. .bazelversion
  17. .clang-format
  18. .dockerignore
  19. .gitignore
  20. .gitmodules
  21. .pylintrc
  22. .style.yapf
  23. .yamllint.yml
  24. AUTHORS
  25. BUILD.bazel
  26. CITATION.cff
  27. CMakeLists.txt
  28. configure_bazel.py
  29. CONTRIBUTING.md
  30. LICENSE
  31. README.md
  32. WORKSPACE
README.md

IREE: Intermediate Representation Execution Environment

IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.

See our website for project details, user guides, and instructions on building from source.

CI Status

Project Status

IREE is still in its early phase. We have settled down on the overarching infrastructure and are actively improving various software components as well as project logistics. It is still quite far from ready for everyday use and is made available without any support at the moment. With that said, we welcome any kind of feedback on any communication channels!

Communication Channels

Related Project Channels

  • MLIR topic within LLVM Discourse: IREE is enabled by and heavily relies on MLIR. IREE sometimes is referred to in certain MLIR discussions. Useful if you are also interested in MLIR evolution.

Architecture Overview

IREE Architecture IREE Architecture

See our website for more information.

Presentations and Talks

  • 2021-06-09: IREE Runtime Design Tech Talk (recording and slides)
  • 2020-08-20: IREE CodeGen: MLIR Open Design Meeting Presentation (recording and slides)
  • 2020-03-18: Interactive HAL IR Walkthrough (recording)
  • 2020-01-31: End-to-end MLIR Workflow in IREE: MLIR Open Design Meeting Presentation (recording and slides)

License

IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.