)]}'
{
  "commit": "55eea4a7a2a194002482f6583f55a3b33c7d671b",
  "tree": "c13a3fb2f91b99fa85c3906dbbc97db1ef71c5d6",
  "parents": [
    "9b634df35b1c55ab085ba6a4d769582d2033f768"
  ],
  "author": {
    "name": "Ben Vanik",
    "email": "ben.vanik@gmail.com",
    "time": "Tue Apr 28 11:45:38 2026 -0700"
  },
  "committer": {
    "name": "Ben Vanik",
    "email": "ben.vanik@gmail.com",
    "time": "Wed Apr 29 13:46:12 2026 -0700"
  },
  "message": "[HAL/AMDGPU] Separate SVM facts from peer flags\n\nRecord AMDGPU SVM/HMM memory-system facts as cold capability state instead of deriving peer behavior from SVM_ACCESSIBLE_BY_DEFAULT. System info now keeps SVM support, default pageable access, and XNACK mode grouped together, and each physical device records SVM direct-host access plus selected fine/coarse device-local placement facts.\n\nAdd a generic SHARED_VIRTUAL_ADDRESS device capability and map it to the existing topology edge bit without letting it select NATIVE buffer modes. AMDGPU now maps SVM_SUPPORTED to SHARED_VIRTUAL_ADDRESS and SVM_ACCESSIBLE_BY_DEFAULT to UNIFIED_MEMORY, while peer addressability and coherency stay owned by per-pool/per-link refinement.\n",
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