[Metal] Fix indirect dispatch offset for sub-allocated parameter buffers (#24644) iree_hal_metal_command_buffer_prepare_dispatch resolved the indirect-dispatch workgroup-count buffer offset as just config.workgroup_count_ref.offset, dropping iree_hal_buffer_byte_offset(buffer) -- the base offset of the parameter buffer within its backing allocation. This is inconsistent with the sibling descriptor path in the same function (which adds byte_offset) and with every other backend: Vulkan and amdgpu route all offsets through a shared resolver that adds byte_offset, and the local HAL resolves through iree_hal_buffer_map_range. When the indirect-parameter buffer is a sub-allocation with a non-zero base offset, the dispatch read the three workgroup-count uint32s from the wrong address and ran a wrong grid. The bug was latent because the Metal allocator returns standalone root buffers (byte_offset==0) and the cross-backend CTS indirect-parameters tests allocate the parameter buffer directly at offset 0. Add byte_offset so the source offset matches the descriptor path and the other backends: workgroups_offset = iree_hal_buffer_byte_offset(config.workgroup_count_ref.buffer) + config.workgroup_count_ref.offset; Adds CTS regression test DispatchIndirectParametersTest.SubAllocatedParameterBuffer, which references the workgroup counts through an iree_hal_buffer_subspan at a non-zero base offset (placing deliberately-wrong counts at offset 0 so a base-offset drop reads a deterministic grid instead of garbage). This is the only test shape that catches the bug, and it exercises it on every backend that supports sub-allocated buffers (Metal, Vulkan, amdgpu). Signed-off-by: Alex Vasile <48962821+Alex-Vasile@users.noreply.github.com> Signed-off-by: Alex Vasile <48962821+Alex-Vasile@users.noreply.github.com>
IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.
See our website for project details, user guides, and instructions on building from source.
Releases notes are published on GitHub releases.
| Package | Release status |
|---|---|
| GitHub release (stable) | |
| GitHub release (nightly) | |
iree-base-compiler | |
iree-base-runtime |
For more details on the release process, see https://iree.dev/developers/general/release-management/.
| Operating system | Build status |
|---|---|
| Linux | |
| macOS | |
| macOS |
For the full list of workflows see https://iree.dev/developers/general/github-actions/.
See our website for more information.
Community meeting recordings: IREE YouTube channel
| Date | Title | Recording | Slides |
|---|---|---|---|
| 2025-06-10 | Data-Tiling in IREE: Achieving High Performance Through Compiler Design (AsiaLLVM) | recording | slides |
| 2025-05-17 | Introduction to GPU architecture and IREE's GPU CodeGen Pipeline | recording | slides |
| 2025-02-12 | The Long Tail of AI: SPIR-V in IREE and MLIR (Vulkanised) | recording | slides |
| 2024-10-01 | Unveiling the Inner Workings of IREE: An MLIR-Based Compiler for Diverse Hardware | recording | |
| 2021-06-09 | IREE Runtime Design Tech Talk | recording | slides |
| 2020-08-20 | IREE CodeGen (MLIR Open Design Meeting) | recording | slides |
| 2020-03-18 | Interactive HAL IR Walkthrough | recording | |
| 2020-01-31 | End-to-end MLIR Workflow in IREE (MLIR Open Design Meeting) | recording | slides |
IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.