tree 6e8b6af4e054fddd0877b0b50591696a1e69272a
parent dd3505291ac1dfa2c6d05f67cc5d72ae763a263a
author Federico Bruzzone <federico.bruzzone.i@gmail.com> 1784217774 +0200
committer GitHub <noreply@github.com> 1784217774 +0000
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsFcBAABCAAQBQJqWQCuCRC1aQ7uu5UhlAAAhBUQABBQKGbQ0UroP/Ur6FNiPAXJ
 B/gVMU/zAeYwREYo336Ea4p5hIuyWO/LPuJvX/98EVg16PLs924CzXGNFgXd4+E8
 w4J23W4ySwk7NcNlSjB5fbUoArdTOeKKz1AZlCYfy/G6WUkMt7WI+oCOjTIqPTB7
 DNmXUSLjhozKlQ9SLaWO/eDFfRoDVD0FKgfukx1KjP5TL+NUuHgRWui85wRhXMm1
 9JDFmCTAe6TFvsLsBPEON/iF9X2DaCKlK5bqWnP6D3UtjRoQlyZcljS/W7n13oL+
 G3WBBQNYKDz8J9WJfjENAy5oyu3a1bD0TN2whZmzOdYSVD39J8y+fB2X2/5bROVe
 0xX2eoPr7ADkV/eLY2oXPfU+gOKWIV9R0FO0ZTdPAAknv0/KeCNih6prxzSc+OLG
 ZZRnNNYzdHpmmgkikSGzPfeC2L9gpXQYi9fEbLHBJQosVbQQqLx7BdUUMSqs6BIn
 IKo+zUBMdxr5OuCwjh72u/ZVZHUN9GUjBYQAAQbwVw54pFZP/JZ3s0l1Bx3WSKxd
 7IoGNHNN9HCnAD7tr/lBkVWxCyvhA9ODZGWlrBypYYzatMa1T3bgb3sonIbhYO0+
 jK2HBbS7IfukEhiqHVavFhOJ8Piq0EQy8aHK/GFVme8B22wki1Bx5YYi/a+2p7NR
 AwCHTesgJ840OVQ+N//r
 =4RqE
 -----END PGP SIGNATURE-----
 

[LLVMCPU] Add SME lowering-strategy tests for f64 and unsupported i8 matmuls (#24656)

`getMatmulAArch64SMEVectorSizes` (within `KernelDispatch.cpp`) only had
test coverage for the f32 matmul case.

This PR add two tests:
- `f64` which uses `[4]x[8]` SME tiles instead of the `[8]x[8]` used for
f32.

https://github.com/iree-org/iree/blob/50d0addfb49254e0b7b746959b360c79437281cc/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp#L1465-L1471
- `i8` which SME does not support

https://github.com/iree-org/iree/blob/50d0addfb49254e0b7b746959b360c79437281cc/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp#L1488-L1502

_AI disclaimer_: I used `Claude:Sonnet5` to write the checks.

---------

Signed-off-by: Federico Bruzzone <federico.bruzzone.i@gmail.com>
Co-authored-by: Ege Beysel <beyselege@gmail.com>