Integrate LLVM at llvm/llvm-project@a76df78470d7
Updates LLVM usage to match
[a76df78470d7](https://github.com/llvm/llvm-project/commit/a76df78470d7)
PiperOrigin-RevId: 371244064
diff --git a/SUBMODULE_VERSIONS.txt b/SUBMODULE_VERSIONS.txt
index a87b9f0..65ba759 100644
--- a/SUBMODULE_VERSIONS.txt
+++ b/SUBMODULE_VERSIONS.txt
@@ -5,7 +5,7 @@
b1fbd33c06cdb0024c67733c6fdec2009d17b384 third_party/googletest
88b845dee001723c4a0db1fe5477de735b6d3bb0 third_party/liburing
52812526859e06920387e631f9b9510530883a17 third_party/llvm-bazel
-6d8d1338629ceeaf6f56dc9eabc72e1a63f05169 third_party/llvm-project
+a76df78470d7994f73df0353225cbddc463cce63 third_party/llvm-project
679d7183b657a24f48d16de1fcefb20d7cd1f6a2 third_party/mlir-emitc
f4414fcd666b59d3cff6737bf9587791f99e6c58 third_party/mlir-hlo
2b2bd45bbf9be04fd22ece5cc1f54679202e9257 third_party/pffft
diff --git a/iree/compiler/Conversion/Common/Transforms.cpp b/iree/compiler/Conversion/Common/Transforms.cpp
index a9dc928..3646ebc 100644
--- a/iree/compiler/Conversion/Common/Transforms.cpp
+++ b/iree/compiler/Conversion/Common/Transforms.cpp
@@ -110,9 +110,11 @@
op.getShapedOperand(*producerIdx).getDefiningOp<memref::SubViewOp>();
assert(promotedViewProducer &&
"expected producer to be a subview op as well");
+ auto layout = DataLayout::closest(op);
Optional<linalg::PromotionInfo> promotionInfo =
- linalg::promoteSubviewAsNewBuffer(
- builder, op.getLoc(), promotedViewProducer, options.allocationFn);
+ linalg::promoteSubviewAsNewBuffer(builder, op.getLoc(),
+ promotedViewProducer,
+ options.allocationFn, layout);
if (!promotionInfo) {
return op.emitError("unable to promote RAW dependence");
}
diff --git a/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndDistributePass.cpp b/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndDistributePass.cpp
index c43ef16..c8b9da6 100644
--- a/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndDistributePass.cpp
+++ b/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndDistributePass.cpp
@@ -52,6 +52,7 @@
Optional<Value> allocateThreadLocalMemory(OpBuilder &b,
memref::SubViewOp subview,
ArrayRef<Value> boundingSubViewSize,
+ mlir::DataLayout &layout,
OperationFolder *folder) {
// Allocate the memory into the entry block of the parent FuncOp. This better
// aligns with the semantics of this memory which is available at the entry of
diff --git a/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndVectorizePass.cpp b/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndVectorizePass.cpp
index 7a2e336..fcbd0c6 100644
--- a/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndVectorizePass.cpp
+++ b/iree/compiler/Conversion/LinalgToLLVM/LinalgTileAndVectorizePass.cpp
@@ -105,7 +105,8 @@
// TODO(ataei): Refactor this into a common utility with LinalgToSPIRV.
Optional<Value> allocateWorkgroupMemoryOnStack(
OpBuilder &b, memref::SubViewOp subview,
- ArrayRef<Value> boundingSubViewSize, OperationFolder *folder) {
+ ArrayRef<Value> boundingSubViewSize, DataLayout &layout,
+ OperationFolder *folder) {
// Allocate the memory into the entry block of the parent FuncOp. This better
// aligns with the semantics of this memory which is available at the entry of
// the function.
diff --git a/iree/compiler/Conversion/LinalgToLLVM/LinalgVectorizePass.cpp b/iree/compiler/Conversion/LinalgToLLVM/LinalgVectorizePass.cpp
index 5c7ac44..8a8a82a 100644
--- a/iree/compiler/Conversion/LinalgToLLVM/LinalgVectorizePass.cpp
+++ b/iree/compiler/Conversion/LinalgToLLVM/LinalgVectorizePass.cpp
@@ -82,6 +82,12 @@
op->replaceAllUsesWith(contract);
});
+ // Lowering transfer ops before unrolling as unrolling doesn't support
+ // transpose.
+ OwningRewritePatternList transferOpLowering(&getContext());
+ vector::populateVectorTransferLoweringPatterns(transferOpLowering);
+ (void)applyPatternsAndFoldGreedily(funcOp, std::move(transferOpLowering));
+
// Apply unrolling patterns.
{
OwningRewritePatternList vectorUnrollPatterns(&getContext());
diff --git a/iree/compiler/Conversion/LinalgToLLVM/test/linalg_vectorize.mlir b/iree/compiler/Conversion/LinalgToLLVM/test/linalg_vectorize.mlir
index 57c8c97..d211883 100644
--- a/iree/compiler/Conversion/LinalgToLLVM/test/linalg_vectorize.mlir
+++ b/iree/compiler/Conversion/LinalgToLLVM/test/linalg_vectorize.mlir
@@ -16,14 +16,21 @@
// CHECK: %[[V6:.*]] = vector.transfer_read %[[I1]][%[[C0]], %[[C0]]], {{.*}} : tensor<3x1xf32>, vector<1x1xf32>
// CHECK: %[[V7:.*]] = vector.transfer_read %[[I1]][%[[C1]], %[[C0]]], {{.*}} : tensor<3x1xf32>, vector<1x1xf32>
// CHECK: %[[V8:.*]] = vector.transfer_read %[[I1]][%[[C2]], %[[C0]]], {{.*}} : tensor<3x1xf32>, vector<1x1xf32>
+// CHECK: %[[VI0:.*]] = vector.insert_strided_slice %[[V6]], %{{.*}} {offsets = [0, 0], strides = [1, 1]} : vector<1x1xf32> into vector<3x1xf32>
+// CHECK: %[[VI1:.*]] = vector.insert_strided_slice %[[V7]], %[[VI0]] {offsets = [1, 0], strides = [1, 1]} : vector<1x1xf32> into vector<3x1xf32>
+// CHECK: %[[VI2:.*]] = vector.insert_strided_slice %[[V8]], %[[VI1]] {offsets = [2, 0], strides = [1, 1]} : vector<1x1xf32> into vector<3x1xf32>
+// CHECK: %[[T:.*]] = vector.transpose %[[VI2]], [1, 0] : vector<3x1xf32> to vector<1x3xf32>
// CHECK: %[[V9:.*]] = vector.transfer_read %[[I2]][%[[C0]], %[[C0]]], {{.*}} : tensor<2x1xf32>, vector<1x1xf32>
// CHECK: %[[VA:.*]] = vector.transfer_read %[[I2]][%[[C1]], %[[C0]]], {{.*}} : tensor<2x1xf32>, vector<1x1xf32>
-// CHECK: %[[D0:.*]] = vector.contract {{.*}} %[[V0]], %[[V6]], %[[V9]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
-// CHECK: %[[D1:.*]] = vector.contract {{.*}} %[[V1]], %[[V7]], %[[D0]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
-// CHECK: %[[D2:.*]] = vector.contract {{.*}} %[[V2]], %[[V8]], %[[D1]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
-// CHECK: %[[D3:.*]] = vector.contract {{.*}} %[[V3]], %[[V6]], %[[VA]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
-// CHECK: %[[D4:.*]] = vector.contract {{.*}} %[[V4]], %[[V7]], %[[D3]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
-// CHECK: %[[D5:.*]] = vector.contract {{.*}} %[[V5]], %[[V8]], %[[D4]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[VE0:.*]] = vector.extract_strided_slice %[[T]] {offsets = [0, 0], sizes = [1, 1], strides = [1, 1]} : vector<1x3xf32> to vector<1x1xf32>
+// CHECK: %[[VE1:.*]] = vector.extract_strided_slice %[[T]] {offsets = [0, 1], sizes = [1, 1], strides = [1, 1]} : vector<1x3xf32> to vector<1x1xf32>
+// CHECK: %[[VE2:.*]] = vector.extract_strided_slice %[[T]] {offsets = [0, 2], sizes = [1, 1], strides = [1, 1]} : vector<1x3xf32> to vector<1x1xf32>
+// CHECK: %[[D0:.*]] = vector.contract {{.*}} %[[V0]], %[[VE0]], %[[V9]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[D1:.*]] = vector.contract {{.*}} %[[V1]], %[[VE1]], %[[D0]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[D2:.*]] = vector.contract {{.*}} %[[V2]], %[[VE2]], %[[D1]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[D3:.*]] = vector.contract {{.*}} %[[V3]], %[[VE0]], %[[VA]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[D4:.*]] = vector.contract {{.*}} %[[V4]], %[[VE1]], %[[D3]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
+// CHECK: %[[D5:.*]] = vector.contract {{.*}} %[[V5]], %[[VE2]], %[[D4]] : vector<1x1xf32>, vector<1x1xf32> into vector<1x1xf32>
// CHECK: %[[W0:.*]] = vector.transfer_write %[[D2]], %[[I2]][%[[C0]], %[[C0]]] {in_bounds = [true, true]} : vector<1x1xf32>, tensor<2x1xf32>
// CHECK: %[[W1:.*]] = vector.transfer_write %[[D5]], %[[W0]][%[[C1]], %[[C0]]] {in_bounds = [true, true]} : vector<1x1xf32>, tensor<2x1xf32>
// CHECK: flow.dispatch.tensor.store %[[W1]]
diff --git a/iree/compiler/Conversion/LinalgToNVVM/TileAndDistribute.cpp b/iree/compiler/Conversion/LinalgToNVVM/TileAndDistribute.cpp
index 072fc5c..3314c95 100644
--- a/iree/compiler/Conversion/LinalgToNVVM/TileAndDistribute.cpp
+++ b/iree/compiler/Conversion/LinalgToNVVM/TileAndDistribute.cpp
@@ -222,7 +222,8 @@
static Optional<Value> allocateWorkgroupMemory(
OpBuilder &b, memref::SubViewOp subview,
- ArrayRef<Value> boundingSubViewSize, OperationFolder *folder) {
+ ArrayRef<Value> boundingSubViewSize, DataLayout &layout,
+ OperationFolder *folder) {
// In CUDA workgroup memory is represented by a global variable. Create a
// global variable and a memref.GetGlobalOp at the beginning of the funtion to
// get the memref.
diff --git a/iree/compiler/Conversion/LinalgToSPIRV/Utils.cpp b/iree/compiler/Conversion/LinalgToSPIRV/Utils.cpp
index fa2cc52..871dbbd 100644
--- a/iree/compiler/Conversion/LinalgToSPIRV/Utils.cpp
+++ b/iree/compiler/Conversion/LinalgToSPIRV/Utils.cpp
@@ -63,6 +63,7 @@
Optional<Value> allocateWorkgroupMemory(OpBuilder &b, memref::SubViewOp subview,
ArrayRef<Value> boundingSubViewSize,
+ DataLayout &layout,
OperationFolder *folder) {
// Allocate the memory into the entry block of the parent FuncOp. This better
// aligns with the semantics of this memory which is available at the entry of
diff --git a/iree/compiler/Conversion/LinalgToSPIRV/Utils.h b/iree/compiler/Conversion/LinalgToSPIRV/Utils.h
index 57b157b..eaad71e 100644
--- a/iree/compiler/Conversion/LinalgToSPIRV/Utils.h
+++ b/iree/compiler/Conversion/LinalgToSPIRV/Utils.h
@@ -37,6 +37,7 @@
/// Allocation callback for allocation workgroup local memory.
Optional<Value> allocateWorkgroupMemory(OpBuilder &b, memref::SubViewOp subview,
ArrayRef<Value> boundingSubViewSize,
+ DataLayout &layout,
OperationFolder *folder);
/// Function used as callback for copyin/copyout in promotion pattern used
diff --git a/third_party/llvm-project b/third_party/llvm-project
index 6d8d133..a76df78 160000
--- a/third_party/llvm-project
+++ b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit 6d8d1338629ceeaf6f56dc9eabc72e1a63f05169
+Subproject commit a76df78470d7994f73df0353225cbddc463cce63
