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parent a70389bb8b12da26a07fc46bd63e9ccd3028862a
author WMC <tnwilly@gmail.com> 1786121953 +0800
committer GitHub <noreply@github.com> 1786121953 +0200
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[LLVMGPU] Add NVVM paged attention pipeline test (#24770)

## Summary

Adds NVVM compile-time pipeline coverage for paged decode attention.

Part of #24766.

The test follows the existing ROCm paged-attention coverage in
`pipeline_vector_distribute_reduction_gfx942.mlir`, adapted for CUDA's
32-thread subgroups.

- Adds an NVVM `VectorDistribute` testcase covering dynamic page tables,
paged KV gathers, causal masking, and `online_attention` lowering.
- Uses an explicit CUDA layout with 128-thread workgroups and 32-thread
subgroups.

## Testing
```sh
/workspace/iree-build/tools/iree-opt --split-input-file \
  --iree-codegen-llvmgpu-nvvm-lowering-pipeline="include-llvm-lowering=false" \
  compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/pipeline_vector_distribute_paged_attention.mlir \
  | /workspace/iree-build/llvm-project/bin/FileCheck \
      compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/pipeline_vector_distribute_paged_attention.mlir

Signed-off-by: weimin023 <tnwilly@gmail.com>