)]}'
{
  "commit": "3699452d60c6dfe483df4675c7e98299fe790ec4",
  "tree": "9932c2047245bf3613057df48e117945e5f6be83",
  "parents": [
    "a70389bb8b12da26a07fc46bd63e9ccd3028862a"
  ],
  "author": {
    "name": "WMC",
    "email": "tnwilly@gmail.com",
    "time": "Sat Aug 08 00:59:13 2026 +0800"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Aug 07 18:59:13 2026 +0200"
  },
  "message": "[LLVMGPU] Add NVVM paged attention pipeline test (#24770)\n\n## Summary\n\nAdds NVVM compile-time pipeline coverage for paged decode attention.\n\nPart of #24766.\n\nThe test follows the existing ROCm paged-attention coverage in\n`pipeline_vector_distribute_reduction_gfx942.mlir`, adapted for CUDA\u0027s\n32-thread subgroups.\n\n- Adds an NVVM `VectorDistribute` testcase covering dynamic page tables,\npaged KV gathers, causal masking, and `online_attention` lowering.\n- Uses an explicit CUDA layout with 128-thread workgroups and 32-thread\nsubgroups.\n\n## Testing\n```sh\n/workspace/iree-build/tools/iree-opt --split-input-file \\\n  --iree-codegen-llvmgpu-nvvm-lowering-pipeline\u003d\"include-llvm-lowering\u003dfalse\" \\\n  compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/pipeline_vector_distribute_paged_attention.mlir \\\n  | /workspace/iree-build/llvm-project/bin/FileCheck \\\n      compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/pipeline_vector_distribute_paged_attention.mlir\n\nSigned-off-by: weimin023 \u003ctnwilly@gmail.com\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5bc165f46ccc3216b198f1ae74dcacbcefb8939b",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/BUILD.bazel",
      "new_id": "eb5ead95cb9c7e7baf414b291025c9f8ddd21705",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/BUILD.bazel"
    },
    {
      "type": "modify",
      "old_id": "6ca9b6d0568227c2c9b0e333ff99976484e35bba",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/CMakeLists.txt",
      "new_id": "efc2d1968038db1e9c19cae817b939c535bb04e5",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/CMakeLists.txt"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "62777db394cea5b1e181bc7f11f66e823e758e0c",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/NVVM/pipeline_vector_distribute_paged_attention.mlir"
    }
  ]
}