)]}'
{
  "commit": "34f93d20972a0c26fc4f57146c8ea5a6f01f1e1e",
  "tree": "aedd9bfaaebf17bbd0be5d9babd92635ae8dfbba",
  "parents": [
    "9c4aa352df00af9ed3230fadcd3d0aa080237c1f"
  ],
  "author": {
    "name": "Lukas Sommer",
    "email": "lukas.sommer@amd.com",
    "time": "Tue Mar 03 08:46:01 2026 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Mar 03 08:46:01 2026 +0100"
  },
  "message": "[VectorDistribute] Consider all compute ops for thread tile size (#23394)\n\nSo far, selection of the thread tile size (`threadLoads`) in reduction\nVectorDistribute lowering strategy selection was purely based on the\nroot operation. If the selected size wasn\u0027t suitable for other compute\noperations in the same dispatch, selection of the VectorDistribute\nstrategy would fail, falling back to other strategies.\n\nThis change addresses an existing TODO to consider the constraints of\nthe other compute ops in the same dispatch when choosing the thread tile\nsize. This may lead to smaller tile sizes (worst case one element per\nthread) if the other compute ops have additional constraints, but allows\nto use the VectorDistribute pipeline for such reductions.\n\nThis fixes https://github.com/iree-org/iree/issues/23340.\n\nAssisted-by: Claude Code\n\nci-extra: test_torch\n\n---------\n\nSigned-off-by: Lukas Sommer \u003clukas.sommer@amd.com\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c9866b9b0ac93917ff15149c266ad116b40f7886",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/ReductionConfigUtils.cpp",
      "new_id": "79d21aca25382b171e92fef3e70ae67dd98a0105",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/ReductionConfigUtils.cpp"
    },
    {
      "type": "modify",
      "old_id": "10f7982eb5045b721e1c32ee0f76e3f4588dcce2",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/config_vector_distribute_reduction_gfx942.mlir",
      "new_id": "731bf0d9d45d641a686df785d6493bf94e4e664c",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/config_vector_distribute_reduction_gfx942.mlir"
    }
  ]
}