)]}'
{
  "commit": "33548616294b02b60467d9c7b68e494a85c7b17f",
  "tree": "0967d1f7a3d4311885e4a767b0def004ed49327e",
  "parents": [
    "ed30f30d7f8d082acf9468f7abfdf43929af16aa"
  ],
  "author": {
    "name": "Vivian Zhang",
    "email": "zhyuhang88@gmail.com",
    "time": "Fri Sep 05 13:09:33 2025 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Sep 05 13:09:33 2025 -0700"
  },
  "message": "[Codegen][IGEMM] Do not pre-pad convs with CHW layout or small input channel size (#21839)\n\nFor CHW layout, there is no need to vectorize the channel dimension for\nim2col ops. Pre-pad input channel dimension may cause over padding when\nfilter H/W size is large, since the reduction dimensions will be\ncollapsed during im2col transform.\n\nFor HWC layout, when the input channel size is small (e.g., inputChannel\n\u003d 3, and paddingSize \u003d 32), pre-padding may also cause perf regression\nbecause of overpad, remove such cases from pre-padding path.\n\n---------\n\nSigned-off-by: yzhang93 \u003czhyuhang88@gmail.com\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6909fbc7616fa624df7e1da61c09f2de9b7beb5d",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/ConfigUtils.cpp",
      "new_id": "21e77c103b1e6d652d9729952cf24bb777ecfdf2",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/GPU/TargetUtils/ConfigUtils.cpp"
    },
    {
      "type": "modify",
      "old_id": "db1909e13df717e0be92d36e51bff909eeb6adbc",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/config_igemm_tile_and_fuse.mlir",
      "new_id": "1f33c99cd6df02f8b4d75b31f95f64072022804d",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/config_igemm_tile_and_fuse.mlir"
    }
  ]
}