)]}'
{
  "commit": "25c2ab37a0323fcd96ad4a9a3cbeb69ccd9ffe10",
  "tree": "d8b58a92079613d1dca7db465117d78dfb0af85a",
  "parents": [
    "26528b9188d7cdddc7429c532ba3fd987a71f602"
  ],
  "author": {
    "name": "Boian Petkantchin",
    "email": "sogartary@yahoo.com",
    "time": "Thu Sep 07 17:47:05 2023 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Sep 07 20:47:05 2023 -0400"
  },
  "message": "[ROCm] Add pieces from the CUDA codgen lowering path (#14769)\n\nEnable iree-llvmgpu-cast-address-space-function.\r\nAdd DropSharedMemoryDeallocOp rewrite pattern in ConvertToROCDLPass.\r\nRemove dynamic legalization for FuncOp.\r\nAdd ConvertToDynamicSharedMemory ConvertToROCDLPass.\r\n\r\nI am not at all confident that these need to be the same on the ROCm\r\npath as are on the CUDA path. If there is no one to express confidence I\r\nwill dig deeper to make sure it makes sense.\r\n\r\n---------\r\n\r\nCo-authored-by: Boian Petkantchin \u003cboian@nod-labs.com\u003e",
  "tree_diff": [
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