[Codegen][CPU] SelectUKernels for inner_tiled + --iree-llvmcpu-enable-llvm-ukernels. (#24569)
Wires the new C-bitcode ukernel framework into the LLVMCPU kernel-config
pipeline. Three pieces:
* `LLVMCPUSelectUKernels.{h,cpp}` — when the target config has
`llvm_ukernels = "inner_tiled"`, `selectUKernel` matches
`iree_codegen.inner_tiled` ops carrying a
`#iree_cpu.data_tiled_mma_layout` and returns a `UKernelDescriptorAttr`
whose name is the corresponding `MMAIntrinsic` enum value lowercased
with the `iree_uk_mma_` prefix (e.g.
`MMA_X86_AVX512BF16_1x16x2_F32_BF16` →
`iree_uk_mma_x86_avx512bf16_1x16x2_f32_bf16`). One ukernel per
intrinsic; `intrinsics_{m,n,k}` flow as function arguments and
specialize via bitcode LTO at the call site. Filters out `None` and the
`MMA_GENERIC_*` family — neither has a corresponding ukernel.
* `--iree-llvmcpu-enable-llvm-ukernels=<csv>` CL flag — bound to a new
`LLVMTarget.llvmUkernels` field, serialized into the target config as
`llvm_ukernels = "<csv>"`. Empty (the default) means off; passing
`inner_tiled` opts dispatches into the new framework. The flag name
leaves room for a future `mlir_ukernels`-style additional category (and
for now `inner_tiled` is also the only value). New helper
`hasLlvmUkernel(config, category)` in Codegen/Utils — distinct from the
existing `hasUkernel` to keep the legacy mmt4d ukernels and the new
LLVM-bitcode ukernels on independent enable flags.
* `KernelDispatch.cpp::setRootConfig(InnerTiledOp)` — calls
`selectUKernel` at the start and, on a match, sets the descriptor via
`setUKernelDescriptor`. Tile sizes and translation_info are unchanged:
the ukernel substitutes for the *innermost* intrinsic execution only,
the surrounding tile sizes and pipeline still hold. Bitcode resolution
is deferred to the `#iree_cpu.ukernel_provider` during
`LowerBitcodeUKernelsPass`, matching the GPU split between "match"
(here) and "attach" (provider).
Lit test (`select_ukernel.mlir`) runs
`iree-llvmcpu-select-lowering-strategy` on two `inner_tiled` ops sharing
the same MMA intrinsic but differing in target config: the one with
`llvm_ukernels = "inner_tiled"` picks up the
`iree_uk_mma_x86_avx512bf16_1x16x2_f32_bf16` descriptor; the other does
not, locking in the "off by default" property.
Progress towards https://github.com/iree-org/iree/issues/24574.
Signed-off-by: Benoit Jacob <jacob.benoit.1@gmail.com>
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>IREE (Intermediate Representation Execution Environment, pronounced as “eerie”) is an MLIR-based end-to-end compiler and runtime that lowers Machine Learning (ML) models to a unified IR that scales up to meet the needs of the datacenter and down to satisfy the constraints and special considerations of mobile and edge deployments.
See our website for project details, user guides, and instructions on building from source.
Releases notes are published on GitHub releases.
| Package | Release status |
|---|---|
| GitHub release (stable) | |
| GitHub release (nightly) | |
iree-base-compiler | |
iree-base-runtime |
For more details on the release process, see https://iree.dev/developers/general/release-management/.
| Operating system | Build status |
|---|---|
| Linux | |
| macOS | |
| macOS |
For the full list of workflows see https://iree.dev/developers/general/github-actions/.
See our website for more information.
Community meeting recordings: IREE YouTube channel
| Date | Title | Recording | Slides |
|---|---|---|---|
| 2025-06-10 | Data-Tiling in IREE: Achieving High Performance Through Compiler Design (AsiaLLVM) | recording | slides |
| 2025-05-17 | Introduction to GPU architecture and IREE's GPU CodeGen Pipeline | recording | slides |
| 2025-02-12 | The Long Tail of AI: SPIR-V in IREE and MLIR (Vulkanised) | recording | slides |
| 2024-10-01 | Unveiling the Inner Workings of IREE: An MLIR-Based Compiler for Diverse Hardware | recording | |
| 2021-06-09 | IREE Runtime Design Tech Talk | recording | slides |
| 2020-08-20 | IREE CodeGen (MLIR Open Design Meeting) | recording | slides |
| 2020-03-18 | Interactive HAL IR Walkthrough | recording | |
| 2020-01-31 | End-to-end MLIR Workflow in IREE (MLIR Open Design Meeting) | recording | slides |
IREE is licensed under the terms of the Apache 2.0 License with LLVM Exceptions. See LICENSE for more information.