)]}'
{
  "commit": "13d9ad9501d878ff61ca1a0f753419f6d78ce85c",
  "tree": "371afbd53727777455ce680ad9d2daef0393fc8c",
  "parents": [
    "83076f9236ba928aced834b7e0597d8d54b5f8bf"
  ],
  "author": {
    "name": "Pooja Hemashekar",
    "email": "hemashekar@roofline.ai",
    "time": "Wed Aug 05 14:48:09 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Aug 05 14:48:09 2026 +0200"
  },
  "message": "[Codegen] Lower data-tiled conv to conv_nchwc ukernel (#24730)\n\nWhen the convolution ukernel is enabled, routes data-tiled convolution\ndispatches through `Mmt4dTilingExpert` pipeline, where the 9D NCHWc\ngeneric is recognized and lowered to an `iree_uk_conv_nchwc` microkernel\ncall.\n\nAssisted-by: Claude code\n\n---------\n\nSigned-off-by: Pooja Hemashekar \u003chemashekar@roofline.ai\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7f40cd729ff18fa783bb32b57ebfaba62d362291",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/CPU/BUILD.bazel",
      "new_id": "1ef369d0b4e9d1d1688607fd08d8bcdd84b1bc53",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/CPU/BUILD.bazel"
    },
    {
      "type": "modify",
      "old_id": "0a52a37e01042f4b0163d911b0ea97f0cf6bfb90",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/CPU/CMakeLists.txt",
      "new_id": "c5880027f6be8c77938f623a3be8f22e336aa0e1",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/CPU/CMakeLists.txt"
    },
    {
      "type": "modify",
      "old_id": "bfaa28e89942beb18054a0a449bc82e0d7c4a28f",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/CPU/CPULowerToUKernels.cpp",
      "new_id": "fdecb8198e07c681db9b2598b5897bedf2d9e1a3",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/CPU/CPULowerToUKernels.cpp"
    },
    {
      "type": "modify",
      "old_id": "a823864230d0d1aee9834e894360062f76ac7eb4",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Common/CPU/test/lower_to_ukernel_ops.mlir",
      "new_id": "ff1f9bc8e778406483e1eb6ae1f1e57300227382",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Common/CPU/test/lower_to_ukernel_ops.mlir"
    },
    {
      "type": "modify",
      "old_id": "aec49271f6002c784bb05e42edbeb20aeb8f07e0",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/Dialect/Codegen/IR/UKernelOps.cpp",
      "new_id": "d94a7247cb929b764260938152eccdc9d80bd7c6",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/Dialect/Codegen/IR/UKernelOps.cpp"
    },
    {
      "type": "modify",
      "old_id": "59e54070602002bb551d4a1cfa0e230a9e0aba91",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp",
      "new_id": "ad3f8925fff699e6fe6e059b87278c664120411d",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp"
    },
    {
      "type": "modify",
      "old_id": "8fc1c5467d827e411dde8595c6a4acce0a04205b",
      "old_mode": 33188,
      "old_path": "compiler/src/iree/compiler/Codegen/LLVMCPU/test/select_x86_64_lowering_strategy.mlir",
      "new_id": "919d832e117e11ecdca0fd5bf94e77df92267e79",
      "new_mode": 33188,
      "new_path": "compiler/src/iree/compiler/Codegen/LLVMCPU/test/select_x86_64_lowering_strategy.mlir"
    }
  ]
}
